B. V. V. Satyanarayana

Orcid: 0000-0003-2601-7014

According to our database1, B. V. V. Satyanarayana authored at least 1 paper in 2020.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Device and Circuit Level Design, Characterization and Implementation of Low Power 7T SRAM Cell using Heterojunction Tunneling Transistors with Oxide Overlap.
Microprocess. Microsystems, 2020


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