B. Srinivasu

According to our database, B. Srinivasu authored at least 6 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2024

Energy Efficient Memristor-Based Subtractors and Comparator for In-Memory Computing in MAGIC.

Nandit Kaushik, B. Srinivasu

IEEE Trans. Circuits Syst. II Express Briefs, June, 2024

Approximate Ternary Matrix Multiplication for Image Processing and Neural Networks.

L. Hemanth Krishna, B. Srinivasu

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

2023

Memristor-based High Speed and Area Efficient Comparators in IMPLY Logic.

Nandit Kaushik, B. Srinivasu

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

2022

High Performance Ternary Full Adder in CNFET-Memristor Logic Technology.

Panasa Srikanth, B. Srinivasu

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2018

CoLPUF : A Novel Configurable LFSR-based PUF.

B. Srinivasu, Vikramkumar Pudi, Anupam Chattopadhyay, Kwok-Yan Lam

Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017

A Synthesis Methodology for Ternary Logic Circuits in Emerging Device Technologies.

B. Srinivasu, K. Sridharan

IEEE Trans. Circuits Syst. I Regul. Pap., 2017