Aydin Aysu

J. Cryptogr. Eng., June, 2024

Masking FALCON's Floating-Point Multiplication in Hardware.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

An Open Source Ecosystem for Implementation Security Testing.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2024

THEMIS: Time, Heterogeneity, and Energy Minded Scheduling for Fair Multi-Tenant Use in FPGAs.

[BibT_eX]

[DOI]

CoRR, 2024

Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum Services.

[BibT_eX]

[DOI]

CoRR, 2024

Extended Abstract: Pre-Silicon Vulnerability Assessment for AI/ML Hardware.

[BibT_eX]

[DOI]

Furkan Aydin

Proceedings of the Great Lakes Symposium on VLSI 2024, 2024

2023

SeqL+: Secure Scan-Obfuscation With Theoretical and Empirical Validation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

A Hardware-Software Co-Design for the Discrete Gaussian Sampling of FALCON Digital Signature.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2023

Hardware-Software Co-design for Side-Channel Protected Neural Network Inference.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2023

Introduction to the Special Issue on the Digital Threats of Hardware Security.

[BibT_eX]

[DOI]

Scott R. Graham

DTRAP, 2023

A Survey of Software Implementations for the Number Theoretic Transform.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023

A Full-Stack Approach for Side-Channel Secure ML Hardware.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2023

SS-AXI: Secure and Safe Access Control Mechanism for Multi-Tenant Cloud FPGAs.

[BibT_eX]

[DOI]

Amro Awad

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking.

[BibT_eX]

[DOI]

IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

An Extensive Study of Flexible Design Methods for the Number Theoretic Transform.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

Efficient, Flexible, and Constant-Time Gaussian Sampling Hardware for Lattice Cryptography.

[BibT_eX]

[DOI]

Erdem Alkim

IEEE Trans. Computers, 2022

Guarding Machine Learning Hardware Against Physical Side-channel Attacks.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2022

Single-Trace Side-Channel Attacks on Ï-Small Polynomial Sampling: With Applications to NTRU, NTRU Prime, and CRYSTALS-DILITHIUM.

[BibT_eX]

[DOI]

Erdem Alkim

IACR Cryptol. ePrint Arch., 2022

Apple vs. EMA: Electromagnetic Side Channel Attacks on Apple CoreCrypto.

[BibT_eX]

[DOI]

Gregor Haas

IACR Cryptol. ePrint Arch., 2022

RevEAL: Single-Trace Side-Channel Leakage of the SEAL Homomorphic Encryption Library.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2022

Towards AI-Enabled Hardware Security: Challenges and Opportunities.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

Hands-On Teaching of Hardware Security for Machine Learning.

[BibT_eX]

[DOI]

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

FAXID: FPGA-Accelerated XGBoost Inference for Data Centers using HLS.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

Multi-Tenant Cloud FPGAs: Side-Channel Security and Safety.

[BibT_eX]

[DOI]

Proceedings of the 2022 on Cloud Computing Security Workshop, 2022

PR Crisis: Analyzing and Fixing Partial Reconfiguration in Multi-Tenant Cloud FPGAs.

[BibT_eX]

[DOI]

Chandu Yuvarajappa

Mohammed Iliyas Shaik

Amro Awad

Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security, 2022

Exposing Side-Channel Leakage of SEAL Homomorphic Encryption Library.

[BibT_eX]

[DOI]

Furkan Aydin

Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security, 2022

High-Fidelity Model Extraction Attacks via Remote Power Monitors.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2021

2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Stealing Neural Network Models through the Scan Chain: A New Threat for ML Hardware.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2021

Falcon Down: Breaking Falcon Post-Quantum Signature Scheme through Side-Channel Attacks.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2021

iTimed: Cache Attacks on the Apple A10 Fusion SoC.

[BibT_eX]

[DOI]

Gregor Haas

IACR Cryptol. ePrint Arch., 2021

An Efficient Non-Profiled Side-Channel Attack on the CRYSTALS-Dilithium Post-Quantum Signature.

[BibT_eX]

[DOI]

Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Single-Trace Side-Channel Attacks on ω-Small Polynomial Sampling: With Applications to NTRU, NTRU Prime, and CRYSTALS-DILITHIUM.

[BibT_eX]

[DOI]

Erdem Alkim

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021

2020

High-Level Synthesis of Number-Theoretic Transform: A Case Study for Future Cryptosystems.

[BibT_eX]

[DOI]

Erdem Ozcan

IEEE Embed. Syst. Lett., 2020

Trustworthy AI Inference Systems: An Industry Research View.

[BibT_eX]

[DOI]

CoRR, 2020

DeePar-SCA: Breaking Parallel Architectures of Lattice Cryptography via Learning Based Side-Channel Attacks.

[BibT_eX]

[DOI]

Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2020

SeqL: Secure Scan-Locking for IP Protection.

[BibT_eX]

[DOI]

Akash Kumar

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

Efficacy of Satisfiability-Based Attacks in the Presence of Circuit Reverse-Engineering Errors.

[BibT_eX]

[DOI]

Qinhan Tan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

BoMaNet: Boolean Masking of an Entire Neural Network.

[BibT_eX]

[DOI]

Rosario Cammarota

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

MaskedNet: The First Hardware Inference Engine Aiming Power Side-Channel Protection.

[BibT_eX]

[DOI]

Rosario Cammarota

Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

RANTT: A RISC-V Architecture Extension for the Number Theoretic Transform.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

A Flexible and Scalable NTT Hardware : Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

MaskedNet: A Pathway for Secure Inference against Power Side-Channel Attacks.

[BibT_eX]

[DOI]

Rosario Cammarota

CoRR, 2019

Using Power-Anomalies to Counter Evasive Micro-Architectural Attacks in Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

Teaching the Next Generation of Cryptographic Hardware Design to the Next Generation of Engineers.

[BibT_eX]

[DOI]

Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE East-West Design & Test Symposium, 2019

2018

Fresh re-keying with strong PUFs: A new approach to side-channel security.

[BibT_eX]

[DOI]

Xiaodan Xi

Michael Orshansky

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Horizontal side-channel vulnerabilities of post-quantum key exchange protocols.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Binary Ring-LWE hardware with power side-channel countermeasures.

[BibT_eX]

[DOI]

Michael Orshansky

Mohit Tiwari

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

A new maskless debiasing method for lightweight physical unclonable functions.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

2016

Resource-constrained and Resource-efficient Modern Cryptosystem Design.

[BibT_eX]

[DOI]

PhD thesis, 2016

Precomputation Methods for Hash-Based Signatures on Energy-Harvesting Platforms.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Compact and low-power ASIP design for lightweight PUF-based authentication protocols.

[BibT_eX]

[DOI]

IET Inf. Secur., 2016

Secure and Private, yet Lightweight, Authentication for the IoT via PUF and CBKA.

[BibT_eX]

[DOI]

Proceedings of the Information Security and Cryptology - ICISC 2016 - 19th International Conference, Seoul, South Korea, November 30, 2016

A design method for remote integrity checking of complex PCBs.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

The Future of Real-Time Security: Latency-Optimized Lattice-Based Digital Signatures.

[BibT_eX]

[DOI]

Bilgiday Yuce

ACM Trans. Embed. Comput. Syst., 2015

Hardware/software co-design of physical unclonable function based authentications on FPGAs.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2015

BitCryptor: Bit-Serialized Compact Crypto Engine on Reconfigurable Hardware.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2015

Precomputation Methods for Faster and Greener Post-Quantum Cryptography on Emerging Embedded Platforms.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2015

End-to-end Design of a PUF-based Privacy Preserving Authentication Protocol.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2015

BitCryptor: Bit-Serialized Flexible Crypto Engine for Lightweight Applications.

[BibT_eX]

[DOI]

Proceedings of the Progress in Cryptology - INDOCRYPT 2015, 2015

2014

SIMON Says, Break the Area Records for Symmetric Key Block Ciphers on FPGAs.

[BibT_eX]

[DOI]

IACR Cryptol. ePrint Arch., 2014

SIMON Says: Break Area Records of Block Ciphers on FPGAs.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2014

A Flexible and Compact Hardware Architecture for the SIMON Block Cipher.

[BibT_eX]

[DOI]

Proceedings of the Lightweight Cryptography for Security and Privacy, 2014

A low power adaptive H.264 video encoder hardware.

[BibT_eX]

[DOI]

Ilker Hamzaoglu

Onur Can Ulusel

Proceedings of the IEEE Fourth International Conference on Consumer Electronics Berlin, 2014

Analyzing and eliminating the causes of fault sensitivity analysis.

[BibT_eX]

[DOI]

Nahid Farhady Ghalaty

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Low cost FPGA design and implementation of a stereo matching system for 3D-TV applications.

[BibT_eX]

[DOI]

Murat Sayinta

Cevahir Cigla

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Three Design Dimensions of Secure Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2013

PASC: Physically authenticated stable-clocked soc platform on low-cost FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Low-cost and area-efficient FPGA implementations of lattice-based cryptography.

[BibT_eX]

[DOI]

Cameron Patterson

Proceedings of the 2013 IEEE International Symposium on Hardware-Oriented Security and Trust, 2013

Digital fingerprints for low-cost platforms using MEMS sensors.

[BibT_eX]

[DOI]

Nahid Farhady Ghalaty

Zane R. Franklin

Moein Pahlavan Yali

Proceedings of the Workshop on Embedded Systems Security, 2013

2011

A low energy adaptive hardware for H.264 multiple reference frame motion estimation.

[BibT_eX]

[DOI]