Ayaskant Shrivastava
According to our database1,
Ayaskant Shrivastava
authored at least 4 papers
between 2015 and 2016.
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Bibliography
2016
IEEE J. Solid State Circuits, 2016
2015
A 5 GS/s 150 mW 10 b SHA-Less Pipelined/SAR Hybrid ADC for Direct-Sampling Systems in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015