Ayan Banerjee
Orcid: 0000-0002-4188-7192Affiliations:
- Indian Institute of Engineering Science and Technology Shibpur, Howrah, India
According to our database1,
Ayan Banerjee
authored at least 29 papers
between 2001 and 2024.
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Bibliography
2024
A Dynamic Window Size-Based VLSI Architecture Design of Moving Average Filter and Its Vulnerability to Hardware Trojans.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024
2023
3D EdgeSegNET: a deep neural network framework for simultaneous edge detection and segmentation of medical images.
Signal Image Video Process., 2023
Resource-efficient VLSI Architecture of Softmax Activation Function for Real-time Inference in Deep Learning Applications.
Proceedings of the International Symposium on Devices, Circuits and Systems, 2023
2022
Cell-Based Synthesis of Multiple Analog Filter and Oscillator Topologies Employing Graph.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
SN Comput. Sci., 2022
Systematic realization of non-linear arithmetic functions using hexagonal Field Programmable Analog Array.
Microelectron. J., 2022
A Novel Reconfigurable Analog VLSI Architecture of M-point DFT Using Complex Matrix Multiplier and Graph-Based Signal Routing Method.
Circuits Syst. Signal Process., 2022
2021
Cellular Automata based Cryptography Model for Reliable Encryption Using State Transition in Wireless Network Optimizing Data Security.
Wirel. Pers. Commun., 2021
CORDIC-Based High-Speed VLSI Architecture of Transform Model Estimation for Real-Time Imaging.
IEEE Trans. Very Large Scale Integr. Syst., 2021
Trans. Large Scale Data Knowl. Centered Syst., 2021
Precise realization of one-staged 2-D DCT using analog current mode architecture in compressed sensing front-end.
Microelectron. J., 2021
A Novel Paradigm of CORDIC-Based FFT Architecture Framed on the Optimality of High-Radix Computation.
Circuits Syst. Signal Process., 2021
VLSI Architecture of Sigmoid Activation Function for Rapid Prototyping of Machine Learning Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021
2020
A memory and area-efficient distributed arithmetic based modular VLSI architecture of 1D/2D reconfigurable 9/7 and 5/3 DWT filters for real-time image decomposition.
J. Real Time Image Process., 2020
A Memory Efficient, Multiplierless & Modular VLSI Architecture of 1D/2D Re-Configurable 9/7 & 5/3 DWT Filters Using Distributed Arithmetic.
J. Circuits Syst. Comput., 2020
Comparative Analysis of Cellular Automata Based Multilingual Encryption Using Syndicate Rules for Data Security.
Proceedings of the Innovations in Bio-Inspired Computing and Applications, 2020
2019
Gabor-based spectral domain automated notch-reject filter for quasi-periodic noise reduction from digital images.
Multim. Tools Appl., 2019
A unified block-based sparse domain solution for quasi-periodic de-noising from different genres of images with iterative filtering.
Multim. Tools Appl., 2019
Modular and parallel VLSI architecture of multi-dimensional quad-core GA co-processor for real time image/video processing.
Microprocess. Microsystems, 2019
Software for Feedback System Using Adaptive Categorization and Authenticated Recommendation.
Int. J. Open Source Softw. Process., 2019
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
2018
Automated spectral domain approach of quasi-periodic denoising in natural images using notch filtration with exact noise profile.
IET Image Process., 2018
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018
Low Area & Memory Efficient VLSI Architecture of 1D/2D DWT for Real Time Image Decomposition.
Proceedings of the 8th International Symposium on Embedded Computing and System Design, 2018
2013
J. Signal Process. Syst., 2013
2005
Novel architecture for QAM modulator-demodulator and its generalization to multicarrier modulation.
Microprocess. Microsystems, 2005
2001
Microprocess. Microsystems, 2001