Axel Hiilsmann

According to our database, Axel Hiilsmann authored at least 1 paper in 1994.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

1994

7.5 Gb/s monolithically integrated clock recovery circuit using PLL and 0.3-μm gate length quantum well HEMT's.

Zhi-Gong Wang, Manfred Berroth, Ulrich Nowotny, Peter Hofmann, Axel Hiilsmann, Klaus Köhler, Brian Raynor, Joachim Schneider

IEEE J. Solid State Circuits, August, 1994