Avi Ziv

Haoxing Ren

ACM Trans. Design Autom. Electr. Syst., March, 2023

Neural Network Accelerated Implicit Filtering: Integrating Neural Network Surrogates With Provably Convergent Derivative Free Optimization Methods.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Machine Learning, 2023

2021

Deep Neural Network Accelerated Implicit Filtering.

[BibT_eX]

[DOI]

CoRR, 2021

Using Deep Neural Networks And Derivative Free Optimization To Accelerate Coverage Closure.

[BibT_eX]

[DOI]

Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021

Automatic Scalable System for the Coverage-Directed Generation (CDG) Problem.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

Using Machine Learning Clustering To Find Large Coverage Holes.

[BibT_eX]

[DOI]

Raviv Gal

Giora Simchoni

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

ML for CAD - Where is the Treasure Hiding?

[BibT_eX]

[DOI]

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

Using DNNs and Smart Sampling for Coverage Closure Acceleration.

[BibT_eX]

[DOI]

Raviv Gal

Eldad Haber

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

Late Breaking Results: FRIENDS - Finding Related Interesting Events via Neighbor Detection.

[BibT_eX]

[DOI]

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

How To Catch A Lion In The Desert - On The Solution Of The Coverage Directed Generation (CDG) Problem.

[BibT_eX]

[DOI]

CoRR, 2019

Challenges and Solutions in Post-Silicon Validation of High-end Processors (Invited Tutorial).

[BibT_eX]

[DOI]

Proceedings of the 2019 Formal Methods in Computer Aided Design, 2019

2017

Post-Silicon Validation in the SoC Era: A Tutorial Introduction.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Cost-effective analysis of post-silicon functional coverage events.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Template Aware Coverage: Taking Coverage Analysis to the Next Level.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

Solving Constraint Satisfaction Problems Containing Vectors of Unknown Size.

[BibT_eX]

[DOI]

Erez Bilgory

Eyal Bin

Proceedings of the Principles and Practice of Constraint Programming, 2017

2016

Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

2015

The Verification Cockpit - Creating the Dream Playground for Data Analytics over the Verification Process.

[BibT_eX]

[DOI]

Klaus-Dieter Schubert

Gil Shurek

Proceedings of the Hardware and Software: Verification and Testing, 2015

2014

Enhancing Scenario Quality Using Quasi-Events.

[BibT_eX]

[DOI]

Yoav Katz

Eitan Marcus

Proceedings of the Hardware and Software: Verification and Testing, 2014

Verification of Transactional Memory in POWER8.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2012

Concurrent Generation of Concurrent Programs for Post-Silicon Validation.

[BibT_eX]

[DOI]

Allon Adir

Amir Nahir

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

A Novel Approach for Implementing Microarchitectural Verification Plans in Processor Designs.

[BibT_eX]

[DOI]

Yoav Katz

Michal Rimon

Proceedings of the Hardware and Software: Verification and Testing, 2012

Approximating checkers for simulation acceleration.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Generating instruction streams using abstract CSP.

[BibT_eX]

[DOI]

Yoav Katz

Michal Rimon

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Checking architectural outputs instruction-by-instruction on acceleration platforms.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Optimizing test-generation to the execution platform.

[BibT_eX]

[DOI]

Amir Nahir

Subrat Panda

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

A probabilistic analysis of coverage methods.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2011

Automatic boosting of cross-product coverage using Bayesian networks.

[BibT_eX]

[DOI]

Int. J. Softw. Tools Technol. Transf., 2011

Reverse Coverage Analysis.

[BibT_eX]

[DOI]

Proceedings of the Hardware and Software: Verification and Testing, 2011

A unified methodology for pre-silicon verification and post-silicon validation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Learning microarchitectural behaviors to improve stimuli generation quality.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

Threadmill: a post-silicon exerciser for multi-threaded processors.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

2010

Reaching Coverage Closure in Post-silicon Validation.

[BibT_eX]

[DOI]

Proceedings of the Hardware and Software: Verification and Testing, 2010

Bridging pre-silicon verification and post-silicon validation.

[BibT_eX]

[DOI]

Proceedings of the 47th Design Automation Conference, 2010

2009

Using Bayesian networks and virtual coverage to hit hard-to-reach events.

[BibT_eX]

[DOI]

Int. J. Softw. Tools Technol. Transf., 2009

2008

A probabilistic alternative to regression suites.

[BibT_eX]

[DOI]

Theor. Comput. Sci., 2008

Ensuring Functional Closure of a Multi-core SoC through Verification Planning, Implementation and Execution.

[BibT_eX]

[DOI]

Proceedings of the Ninth International Workshop on Microprocessor Test and Verification, 2008

Automatic Boosting of Cross-Product Coverage Using Bayesian Networks.

[BibT_eX]

[DOI]

Dorit Baras

Proceedings of the Hardware and Software: Verification and Testing, 2008

Special session - What's so intelligent about testbenches?

[BibT_eX]

[DOI]

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

2007

Using Virtual Coverage to Hit Hard-To-Reach Events.

[BibT_eX]

[DOI]

Proceedings of the Hardware and Software: Verification and Testing, 2007

Verification Coverage: When is Enough, Enough?

[BibT_eX]

Proceedings of the 44th Design Automation Conference, 2007

2006

Harnessing Machine Learning to Improve the Success Rate of Stimuli Generation.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

Advanced Analysis Techniques for Cross-Product Coverage.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

Using Linear Programming Techniques for Scheduling-Based Random Test-Case Generation.

[BibT_eX]

[DOI]

Amir Nahir

Yossi Shiloach

Proceedings of the Hardware and Software, 2006

Scheduling-based test-case generation for verification of multimedia SoCs.

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

2005

Panel: Functional coverage - is your design exposed?

[BibT_eX]

[DOI]

Andrew Piziali

Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

Advanced analysis techniques for cross-product coverage.

[BibT_eX]

[DOI]

Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

2004

Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2004

Probabilistic Alternative Regression Suites.

[BibT_eX]

Proceedings of the International Symposium on Leveraging Applications of Formal Methods, 2004

Enhancing the efficiency of Bayesian network based coverage directed test generation.

[BibT_eX]

[DOI]

Markus Braun

Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

Stimuli Generation with Late Binding of Values.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

Probabilistic regression suites for functional verification.

[BibT_eX]

[DOI]

Shmuel Ur

Proceedings of the 41th Design Automation Conference, 2004

Defining coverage views to improve functional coverage analysis.

[BibT_eX]

[DOI]

Sigal Asaf

Eitan Marcus

Proceedings of the 41th Design Automation Conference, 2004

2003

Solving the generalized mask constraint for test generation of binary floating point add operation.

[BibT_eX]

[DOI]

Theor. Comput. Sci., 2003

Panel: What's the next 'big thing' in simulation-based verification?

[BibT_eX]

[DOI]

Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

Enhancing the control and efficiency of the covering process [logic verification].

[BibT_eX]

[DOI]

Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

Piparazzi: a test program generator for micro-architecture flow verification.

[BibT_eX]

[DOI]

Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

Functional Verification Environment for Object-oriented Hardware Designs.

[BibT_eX]

[DOI]

Proceedings of the Forum on specification and Design Languages, 2003

Cross-Product Functional Coverage Measurement with Temporal Properties-Based Assertions .

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

Coverage directed test generation for functional verification using bayesian networks.

[BibT_eX]

[DOI]

Proceedings of the 40th Design Automation Conference, 2003

Solving Range Constraints for Binary Floating-Point Instructions.

[BibT_eX]

[DOI]

Merav Aharoni

Sigal Asaf

Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003

2002

Using a constraint satisfaction formulation and solution techniques for random test program generation.

[BibT_eX]

[DOI]

IBM Syst. J., 2002

Hole analysis for functional coverage data.

[BibT_eX]

[DOI]

Proceedings of the 39th Design Automation Conference, 2002

2001

Cost evaluation of coverage directed test generation for the IBM mainframe.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

1998

Analysis of Checkpointing Schemes with Task Duplication.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1998

Design Reliability - Estimation through Statistical Analysis of Bug Discovery Data.

[BibT_eX]

[DOI]

Yossi Malka

Proceedings of the 35th Conference on Design Automation, 1998

User Defined Coverage - A Tool Supported Methodology for Design Verification.

[BibT_eX]

[DOI]

Proceedings of the 35th Conference on Design Automation, 1998

1997

Performance Optimization of Checkpointing Schemes with Task Duplication.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1997

An On-Line Algorithm for Checkpoint Placement.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1997

1994

Analysis of Checkpointing Schemes for Multiprocessor Systems.

[BibT_eX]

[DOI]

Proceedings of the 13th Symposium on Reliable Distributed Systems, 1994

Placement and Routing for a Field Programmable Multi-Chip Module.

[BibT_eX]

[DOI]

Sanko Lan