2025
HALTRAV: Design of a High-Performance and Area-Efficient Latch With Triple-Node-Upset Recovery and Algorithm-Based Verifications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2025
A high-speed hardware accelerator for lightweight dehazing neural network based on SFA-Net.
J. Real Time Image Process., April, 2025
Image encryption/decryption accelerator based on Fast Cosine Number Transform.
Integr., 2025
2024
An energy-efficient dehazing neural network accelerator based on E<sup>2</sup>AOD-Net.
J. Real Time Image Process., December, 2024
High-speed hardware accelerator based on brightness improved by Light-DehazeNet.
J. Real Time Image Process., May, 2024
An Efficient Ring Polynomial Multiplication Accelerator for Homomorphic Encryption.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024
A fast hardware accelerator for nighttime fog removal based on image fusion.
Integr., 2024
Enhancing Digital Hologram Reconstruction Using Reverse-Attention Loss for Untrained Physics-Driven Deep Learning Models with Uncertain Distance.
CoRR, 2024
ICLTR: A Input-split Inverters and C-elements based Low-Cost Latch with Triple-Node-Upset Recovery.
Proceedings of the IEEE International Test Conference in Asia, 2024
A Low-Latency Polynomial Multiplier Accelerator for CRYSTALS-Dilithium Digital Signature.
Proceedings of the Great Lakes Symposium on VLSI 2024, 2024
2023
An Area-Efficient Large Integer NTT-Multiplier Using Discrete Twiddle Factor Approach.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
Design of a Data Transmission Control Unit in a Multi-core DSP System.
Proceedings of the 15th IEEE International Conference on ASIC, 2023
2022
A BNN Accelerator Based on Edge-skip-calculation Strategy and Consolidation Compressed Tree.
ACM Trans. Reconfigurable Technol. Syst., 2022
RB-OLITS: A Worst Case Reorder Buffer Size Reduction Approach for 3-D-NoC.
IEEE Des. Test, 2022
2021
A Real-Time Effective Fusion-Based Image Defogging Architecture on FPGA.
ACM Trans. Multim. Comput. Commun. Appl., 2021
A new method of abnormal behavior detection using LSTM network with temporal attention mechanism.
J. Supercomput., 2021
SCNET: A Novel UGI Cancer Screening Framework Based on Semantic-Level Multimodal Data Fusion.
IEEE J. Biomed. Health Informatics, 2021
Design of node separated triple-node-upset self-recoverable latch.
Microelectron. J., 2021
An abnormal event detection method based on the Riemannian manifold and LSTM network.
Neurocomputing, 2021
MSCI: A multistate dataset for colposcopy image classification of cervical cancer screening.
Int. J. Medical Informatics, 2021
Algorithm-hardware co-design of ultra-high radix based high throughput modular multiplier.
IEICE Electron. Express, 2021
Optimization of Node-clustering-based DAG partition targeting NVDLA Architecture.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2020
A low-latency DMM-1 encoder for 3D-HEVC.
J. Real Time Image Process., 2020
2019
Allocation and scheduling of SystemJ programs on chip multiprocessors with weighted TDMA scheduling.
J. Syst. Archit., 2019
SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method.
ACM J. Emerg. Technol. Comput. Syst., 2019
Diabetic complication prediction using a similarity-enhanced latent Dirichlet allocation model.
Inf. Sci., 2019
Smart electronic gastroscope system using a cloud-edge collaborative framework.
Future Gener. Comput. Syst., 2019
A Survey on Multimodal Data-Driven Smart Healthcare Systems: Approaches and Applications.
IEEE Access, 2019
NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
Efficient Softmax Hardware Architecture for Deep Neural Networks.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
2017
Using design space exploration for finding schedules with guaranteed reaction times of synchronous programs on multi-core architecture.
J. Syst. Archit., 2017
On the Accuracy of Stochastic Delay Bound for Network on Chip.
Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017
SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress).
Proceedings of the 2017 International Conference on Compilers, 2017
2016
Times Square - Marriage of Real-Time and Logical-Time in GALS and Synchronous Languages.
J. Signal Process. Syst., 2016
2015
Reducing Worst Case Reaction Time of Synchronous Programs on Chip-multiprocessors with Application-Specific TDMA Scheduling.
Proceedings of the 13th International Workshop on Java Technologies for Real-time and Embedded Systems, 2015
2014
Bug characteristics in open source software.
Empir. Softw. Eng., 2014
TACO: A scalable framework for timing analysis and code optimization of synchronous programs.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014
Study on the precision evaluation index in building seismic damage information extraction from remote sensing image.
Proceedings of the 2014 IEEE Geoscience and Remote Sensing Symposium, 2014
2013
GALS-CMP: Chip-Multiprocessor for GALS Embedded Systems.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013
2009
Understanding Customer Problem Troubleshooting from Storage System Logs.
Proceedings of the 7th USENIX Conference on File and Storage Technologies, 2009
2008
CISpan: Comprehensive Incremental Mining Algorithms of Closed Sequential Patterns for Multi-Versional Software Mining.
Proceedings of the SIAM International Conference on Data Mining, 2008
2007
MUVI: automatically inferring multi-variable access correlations and detecting related semantic and concurrency bugs.
Proceedings of the 21st ACM Symposium on Operating Systems Principles 2007, 2007
Address Code Optimization Exploiting Code Scheduling in DSP Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Using Data Mining Techniques to Improve Software Reliability
PhD thesis, 2006
CP-Miner: Finding Copy-Paste and Related Bugs in Large-Scale Software Code.
IEEE Trans. Software Eng., 2006
LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006
Have things changed now?: an empirical study of bug characteristics in modern open source software.
Proceedings of the 1st Workshop on Architectural and System Support for Improving Software Dependability, 2006
2005
Performance directed energy management for main memory and disks.
ACM Trans. Storage, 2005
Mining block correlations to improve storage performance.
ACM Trans. Storage, 2005
PR-Miner: automatically extracting implicit programming rules and detecting violations in large software code.
Proceedings of the 10th European Software Engineering Conference held jointly with 13th ACM SIGSOFT International Symposium on Foundations of Software Engineering, 2005
2004
Performance-Directed Energy Management for Storage Systems.
IEEE Micro, 2004
CP-Miner: A Tool for Finding Copy-paste and Related Bugs in Operating System Code.
Proceedings of the 6th Symposium on Operating System Design and Implementation (OSDI 2004), 2004
Reducing Energy Consumption of Disk Storage Using Power-Aware Cache Management.
Proceedings of the 10th International Conference on High-Performance Computer Architecture (HPCA-10 2004), 2004
C-Miner: Mining Block Correlations in Storage Systems.
Proceedings of the FAST '04 Conference on File and Storage Technologies, March 31, 2004
Performance directed energy management for main memory and disks.
Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004
2003
Fragmentation based D-MAC Protocol in Wireless Ad Hoc Network.
Proceedings of the 23rd International Conference on Distributed Computing Systems (ICDCS 2003), 2003