TaDA: Task Decoupling Architecture for the Battery-less Internet of Things.
Proceedings of the 22nd ACM Conference on Embedded Networked Sensor Systems, 2024
TangramFP: Energy-Efficient, Bit-Parallel, Multiply-Accumulate for Deep Neural Networks.
Proceedings of the 36th IEEE International Symposium on Computer Architecture and High Performance Computing, 2024
SE-CNN: Convolution Neural Network Acceleration via Symbolic Value Prediction.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
Game-of-Life Temperature-Aware DVFS Strategy for Tile-Based Chip Many-Core Processors.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
Silent Stores in the Battery-less Internet of Things: A Good Idea?
Proceedings of the 2023 International Conference on embedded Wireless Systems and Networks, 2023
TSOPER: Efficient Coherence-Based Strict Persistency.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
Pursuing Extreme Power Efficiency With PPCC Guided NoC DVFS.
IEEE Trans. Computers, 2020
Power and Performance Optimization for Network-on-Chip based Many-Core Processors.
PhD thesis, 2019
Thread Voting DVFS for Manycore NoCs.
IEEE Trans. Computers, 2018
iNPG: Accelerating Critical Section Access with In-network Packet Generation for NoC Based Many-Cores.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018
Dynamic Traffic Regulation in NoC-Based Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2017
Marginal Performance: Formalizing and Quantifying Power Over/Under Provisioning in NoC DVFS.
IEEE Trans. Computers, 2017
Prediction based convolution neural network acceleration: work-in-progress.
Proceedings of the 2017 International Conference on Compilers, 2017
Aggregate Flow-Based Performance Fairness in CMPs.
ACM Trans. Archit. Code Optim., 2016
Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs.
Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016
DVFS for NoCs in CMPs: A thread voting approach.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016
Memory-access aware DVFS for network-on-chip in CMPs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Towards stochastic delay bound analysis for Network-on-Chip.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
Fuzzy flow regulation for Network-on-Chip based chip multiprocessors systems.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014