A 0.25-μm CMOS quad-band GSM RF transceiver using an efficient LO frequency plan.
IEEE J. Solid State Circuits, 2005
Comparison frequency doubling and charge pump matching techniques for dual-band ΔΣ fractional-N frequency synthesizer.
,
,
,
,
,
,
,
,
,
,
IEEE J. Solid State Circuits, 2005
Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver.
IEEE J. Solid State Circuits, 2003
A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems.
IEEE J. Solid State Circuits, 2002
An image resolution enhancing technique using adaptive sub-pixel interpolation for digital still camera system.
IEEE Trans. Consumer Electron., 1999
A Semi-Digital Delay Locked Loop for Clock Skew Minimization.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999