Collusive Stability with Relative Performance and Network Externalities.
Games, June, 2024
An Open-Source EDA Flow for Asynchronous Logic.
IEEE Des. Test, 2021
Cyclone: A Static Timing and Power Engine for Asynchronous Circuits.
Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020
Unlocking fine-grain parallelism for AIG rewriting.
Proceedings of the International Conference on Computer-Aided Design, 2018
Can Parallel Programming Revolutionize EDA Tools?
Proceedings of the Advanced Logic Synthesis, 2018
Parallel triangle counting and k-truss identification using graph-centric methods.
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017
Automatic generation of high-speed accurate TLM models for out-of-order pipelined bus.
ACM Trans. Embed. Comput. Syst., 2013
A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012