Exploring Applications of STT-RAM in GPU Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Thread Batching for High-performance Energy-efficient GPU Memory Design.
ACM J. Emerg. Technol. Comput. Syst., 2019
Neuromorphic computing's yesterday, today, and tomorrow - an evolutional view.
Integr., 2018
Neu-NoC: A high-efficient interconnection network for accelerated neuromorphic systems.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
Harmonica: A Framework of Heterogeneous Computing Systems With Memristor-Based Neuromorphic Computing Accelerators.
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IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Heterogeneous systems with reconfigurable neuromorphic computing accelerators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
TEMP: thread batch enabled memory partitioning for GPU.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Hardware acceleration for neuromorphic computing: An evolving view.
Proceedings of the 15th Non-Volatile Memory Technology Symposium, 2015
The applications of memristor devices in next-generation cortical processor designs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
RENO: a high-efficient reconfigurable neuromorphic computing accelerator design.
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Proceedings of the 52nd Annual Design Automation Conference, 2015
An efficient STT-RAM-based register file in GPU architectures.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
Emerging memristor technology enabled next generation cortical processor.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014
Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper).
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
A heterogeneous computing system with memristor-based neuromorphic accelerators.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014
STD-TLB: A STT-RAM-based dynamically-configurable translation lookaside buffer for GPU architectures.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014