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A compute-in-memory chip based on resistive random-access memory.
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Nat., 2022
Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory.
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CoRR, 2021
33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models.
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Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
A 1.52 pJ/Spike Reconfigurable Multimodal Integrate-and-Fire Neuron Array Transceiver.
Proceedings of the International Conference on Neuromorphic Systems, 2020
Coming Up N3XT, After 2D Scaling of Si CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Neuromorphic architectures with electronic synapses.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016