Formal Modeling and Verification of a Victim DRAM Cache.
ACM Trans. Design Autom. Electr. Syst., 2019
Formal Modeling and Verification of Controllers for a Family of DRAM Caches.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
ReDRAM: A Reconfigurable DRAM Cache for GPGPUs.
IEEE Comput. Archit. Lett., 2018
CAMO: A novel cache management organization for GPGPUs.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018