Communication and Radar Signal Separation in Overlapping Frequency Bands Using Conv-TasNet.
Proceedings of the 15th International Conference on Information and Communication Technology Convergence, 2024
A 4nm 32Gb/s 8Tb/s/mm Die-to-Die Chiplet Using NRZ Single-Ended Transceiver With Equalization Schemes And Training Techniques.
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Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-Detection.
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Proceedings of the IEEE International Solid- State Circuits Conference, 2023
22.5 An 8nm 18Gb/s/pin GDDR6 PHY with TX Bandwidth Extension and RX Training Technique.
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Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
23.6 A 0.6V 4.266Gb/s/pin LPDDR4X interface with auto-DQS cleaning and write-VWM training for memory controller.
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Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017