QiMeng: Fully Automated Hardware and Software Design for Processor Chip.
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CoRR, June, 2025
CodeV-R1: Reasoning-Enhanced Verilog Generation.
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CoRR, May, 2025
QiMeng-CPU-v2: Automated Superscalar Processor Design by Learning Data Dependencies.
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CoRR, May, 2025
AGON: Automated Design Framework for Customizing Processors from ISA Documents.
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CoRR, 2024
Automated CPU Design by Learning from Input-Output Examples.
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Proceedings of the Thirty-Third International Joint Conference on Artificial Intelligence, 2024
Revisiting Automatic Pipelining: Gate-level Forwarding and Speculation.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024
Pushing the Limits of Machine Design: Automated CPU Design with AI.
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CoRR, 2023
Cambricon-P: A Bitflow Architecture for Arbitrary Precision Computing.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
BSHIFT: A Low Cost Deep Neural Networks Accelerator.
Int. J. Parallel Program., 2019
Decentralized Fault Tolerant Control for a Class of Interconnected Nonlinear Systems.
IEEE Trans. Cybern., 2018
An integrated fault estimation and accommodation design for a class of complex networks.
Neurocomputing, 2016