2025
QiMeng: Fully Automated Hardware and Software Design for Processor Chip.
CoRR, June, 2025

CodeV-R1: Reasoning-Enhanced Verilog Generation.
CoRR, May, 2025

QiMeng-CPU-v2: Automated Superscalar Processor Design by Learning Data Dependencies.
CoRR, May, 2025

2024
AGON: Automated Design Framework for Customizing Processors from ISA Documents.
CoRR, 2024

Automated CPU Design by Learning from Input-Output Examples.
Proceedings of the Thirty-Third International Joint Conference on Artificial Intelligence, 2024

Revisiting Automatic Pipelining: Gate-level Forwarding and Speculation.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Pushing the Limits of Machine Design: Automated CPU Design with AI.
CoRR, 2023

2022
Cambricon-P: A Bitflow Architecture for Arbitrary Precision Computing.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2019
BSHIFT: A Low Cost Deep Neural Networks Accelerator.
Int. J. Parallel Program., 2019

2018
Decentralized Fault Tolerant Control for a Class of Interconnected Nonlinear Systems.
IEEE Trans. Cybern., 2018

2016
An integrated fault estimation and accommodation design for a class of complex networks.
Neurocomputing, 2016