Effect of Complex Permeability on Circuit Parameters of CPW with Magnetic Noise Suppression Sheet.
IEICE Trans. Commun., 2020
A charge recycling stacked I/O in standard CMOS technology for wide TSV data bus.
IEICE Electron. Express, 2020
Analysis of on-chip digital noise coupling path for wireless communication IC test chip.
Proceedings of the 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2015
Chip Level Simulation of Substrate Noise Coupling and Interference in RF ICs with CMOS Digital Noise Emulator.
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IEICE Trans. Electron., 2014
In-band spurious attenuation in LTE-class RFIC chip using a soft magnetic thin film.
Proceedings of the 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits, 2013
Measurements and simulation of substrate noise coupling in RF ICs with CMOS digital noise emulator.
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Proceedings of the 9th International Workshop on Electromagnetic Compatibility of Integrated Circuits, 2013