A 225mW 28Gb/s SerDes in 40nm CMOS with 13dB of analog equalization for 100GBASE-LR4 and optical transport lane 4.4 applications.
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Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 12.5Gb/s SerDes in 65nm CMOS Using a Baud-Rate ADC with Digital Receiver Equalization and Clock Recovery.
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Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007