Low-Cost Intrusion Detection System for CAN Bus Networks Using RISC-V with Binarised Neural Networks.
Proceedings of the IEEE International Conference on Industrial Technology, 2025
BIDS: An efficient Intrusion Detection System for in-vehicle networks using a two-stage Binarised Neural Network on low-cost FPGA.
J. Syst. Archit., 2024
Soft Error Assessment of UAV Control Algorithms Running in Resource-Constrained Microprocessors.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024
An FPGA-Based Intrusion Detection System Using Binarised Neural Network for CAN Bus Systems.
Proceedings of the IEEE International Conference on Industrial Technology, 2024
Exploring RISC-V Based DNN Accelerators.
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2024
A New Method for Semi-Supervised Segmentation of Satellite Images.
Proceedings of the 22nd IEEE International Conference on Industrial Technology, 2021
Simultaneous Multiprocessing on FPGA-CPU Heterogeneous Chips.
Proceedings of the 22nd IEEE International Conference on Industrial Technology, 2021
Reliability Model Development for Wind Turbine Drivetrain with Brushless Doubly-Fed Induction Machine as Generator.
Proceedings of the 22nd IEEE International Conference on Industrial Technology, 2021
Correction to: Simultaneous multiprocessing in a software-defined heterogeneous FPGA.
J. Supercomput., 2019
Simultaneous multiprocessing in a software-defined heterogeneous FPGA.
J. Supercomput., 2019
FPGA-Based Processor Acceleration for Image Processing Applications.
J. Imaging, 2019
Workload Partitioning Strategy for Improved Parallelism on FPGA-CPU Heterogeneous Chips.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018
Multi-precision convolutional neural networks on heterogeneous hardware.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018