MatrixFlow: System-Accelerator co-design for high-performance transformer applications.
CoRR, March, 2025
Gem5-AcceSys: Enabling System-Level Exploration of Standard Interconnects for Novel Accelerators.
CoRR, February, 2025
Intermediate Address Space: virtual memory optimization of heterogeneous architectures for cache-resident workloads.
ACM Trans. Archit. Code Optim., September, 2024