2020
Thwarting Replication Attack Against Memristor-Based Neuromorphic Computing System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Adversarial Attack: A New Threat to Smart Devices and How to Defend It.
IEEE Consumer Electron. Mag., 2020
2019
In situ training of feed-forward and recurrent convolutional memristor networks.
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Nat. Mach. Intell., 2019
Long short-term memory networks in memristor crossbar arrays.
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Nat. Mach. Intell., 2019
Approximating Back-propagation for a Biologically Plausible Local Learning Rule in Spiking Neural Networks.
Proceedings of the International Conference on Neuromorphic Systems, 2019
AdverQuil: an efficient adversarial detection and alleviation technique for black-box neuromorphic computing systems.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
AnRAD: A Neuromorphic Anomaly Detection Framework for Massive Concurrent Data Streams.
IEEE Trans. Neural Networks Learn. Syst., 2018
Long short-term memory networks in memristor crossbars.
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CoRR, 2018
MAT: A Multi-strength Adversarial Training Method to Mitigate Adversarial Attacks.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
A Quantized Training Method to Enhance Accuracy of ReRAM-based Neuromorphic Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Unconventional computing with diffusive memristors.
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Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Large Memristor Crossbars for Analog Computing.
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Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Pulse-Width Modulation based Dot-Product Engine for Neuromorphic Computing System using Memristor Crossbar Array.
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Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
Generative Poisoning Attack Method Against Neural Networks.
CoRR, 2017
A Multi-strength Adversarial Training Method to Mitigate Adversarial Attacks.
CoRR, 2017
A closed-loop design to enhance weight stability of memristor based neural network chips.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
A memristor-based neuromorphic engine with a current sensing scheme for artificial neural network applications.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Harmonica: A Framework of Heterogeneous Computing Systems With Memristor-Based Neuromorphic Computing Accelerators.
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IEEE Trans. Circuits Syst. I Regul. Pap., 2016
A Memristor Crossbar Based Computing Engine Optimized for High Speed and Accuracy.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
A neuromorphic ASIC design using one-selector-one-memristor crossbar.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Security of neuromorphic systems: Challenges and solutions.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Cyclical sensing integrate-and-fire circuit for memristor array based neuromorphic computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Built-in selectors self-assembled into memristors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Probabilistic inference using stochastic spiking neural networks on a neurosynaptic processor.
Proceedings of the 2016 International Joint Conference on Neural Networks, 2016
Security challenges in smart surveillance systems and the solutions based on emerging nano-devices.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Security of neuromorphic computing: thwarting learning attacks using memristor's obsolescence effect.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
A new learning method for inference accuracy, core occupation, and performance co-optimization on TrueNorth chip.
Proceedings of the 53rd Annual Design Automation Conference, 2016
2015
The applications of memristor devices in next-generation cortical processor designs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Self-structured confabulation network for fast anomaly detection and reasoning.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015
A spiking neuromorphic design with resistive crossbar.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Cloning your mind: security challenges in cognitive system designs and their solutions.
Proceedings of the 52nd Annual Design Automation Conference, 2015
RENO: a high-efficient reconfigurable neuromorphic computing accelerator design.
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Proceedings of the 52nd Annual Design Automation Conference, 2015
Vortex: variation-aware training for memristor X-bar.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Spiking-based matrix computation by leveraging memristor crossbar array.
Proceedings of the 2015 IEEE Symposium on Computational Intelligence for Security and Defense Applications, 2015
2014
Memristor Crossbar-Based Neuromorphic Computing System: A Case Study.
IEEE Trans. Neural Networks Learn. Syst., 2014
Neuromorphic hardware acceleration enabled by emerging technologies (Invited paper).
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Bio-inspired computing with resistive memories - models, architectures and applications.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Reduction and IR-drop compensations techniques for reliable neuromorphic computing systems.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
A heterogeneous computing system with memristor-based neuromorphic accelerators.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014
A confabulation model for abnormal vehicle events detection in wide-area traffic monitoring.
Proceedings of the IEEE International Inter-Disciplinary Conference on Cognitive Methods in Situation Awareness and Decision Support, 2014
2013
Achieving autonomous power management using reinforcement learning.
ACM Trans. Design Autom. Electr. Syst., 2013
A Parallel Neuromorphic Text Recognition System and Its Implementation on a Heterogeneous High-Performance Computing Cluster.
IEEE Trans. Computers, 2013
A neuromorphic architecture for anomaly detection in autonomous large-area traffic monitoring.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
BSB training scheme implementation on memristor-based circuit.
Proceedings of the 2013 IEEE Symposium on Computational Intelligence for Security and Defense Applications, 2013
2012
Adaptive Power Management for Energy Harvesting Embedded Systems.
Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012
Harvesting-Aware Power Management for Real-Time Systems With Renewable Energy.
IEEE Trans. Very Large Scale Integr. Syst., 2012
A Multi-Agent Framework for Thermal Aware Task Migration in Many-Core Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2012
Low Power Task Scheduling and Mapping for Applications with Conditional Branches on Heterogeneous Multi-Processor System.
J. Low Power Electron., 2012
Neuromorphic computing: A SoC scaling path for the next decades.
Proceedings of the IEEE 25th International SOC Conference, 2012
Memristor crossbar based hardware realization of BSB recall function.
Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012
Hardware realization of BSB recall function using memristor crossbar arrays.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Tag-assisted sentence confabulation for intelligent text recognition.
Proceedings of the 2012 IEEE Symposium on Computational Intelligence for Security and Defence Applications, 2012
2011
Exploiting memristance for low-energy neuromorphic computing hardware.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
A low-power memristive neuromorphic circuit utilizing a global/local training mechanism.
Proceedings of the 2011 International Joint Conference on Neural Networks, 2011
Unified perception-prediction model for context aware text recognition on a heterogeneous many-core platform.
Proceedings of the 2011 International Joint Conference on Neural Networks, 2011
Confabulation based sentence completion for machine reading.
Proceedings of the 2011 IEEE Symposium on Computational Intelligence, 2011
2010
Thermal-aware job allocation and scheduling for three dimensional chip multiprocessor.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Load-matching adaptive task scheduling for energy efficiency in energy harvesting real-time embedded systems.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Accurate modeling and prediction of energy availability in energy harvesting real-time embedded systems.
Proceedings of the International Green Computing Conference 2010, 2010
2009
An adaptive scheduling and voltage/frequency selection algorithm for real-time energy harvesting systems.
Proceedings of the 46th Design Automation Conference, 2009
2008
Bus encoding for simultaneous delay and energy optimization.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
A probabilistic technique for full-chip leakage estimation.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Accelerating cogent confabulation: An exploration in the architecture design space.
Proceedings of the International Joint Conference on Neural Networks, 2008
Performance optimization for pattern recognition using associative neural memory.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
Full-chip leakage current estimation based on statistical sampling techniques.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Adaptive Scheduling and Voltage Scaling for Multiprocessor Real-time Applications with Non-deterministic Workload.
Proceedings of the Design, Automation and Test in Europe, 2008
Energy Aware Dynamic Voltage and Frequency Selection for Real-Time Systems with Energy Harvesting.
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Hardware acceleration of multi-deme genetic algorithm for the application of DNA codeword searching.
Proceedings of the Genetic and Evolutionary Computation Conference, 2007
Hardware Acceleration for Thermodynamic Constrained DNA Code Generation.
Proceedings of the DNA Computing, 13th International Meeting on DNA Computing, 2007
Stochastic modeling and optimization for robust power management in a partially observable system.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Architectural Design and Complexity Analysis of Large-Scale Cortical Simulation on a Hybrid Computing Platform.
Proceedings of the 2007 IEEE Symposium on Computational Intelligence in Security and Defense Applications, 2007
Hybrid Architecture for Accelerating DNA Codeword Library Searching.
Proceedings of the 2007 IEEE Symposium on Computational Intelligence in Bioinformatics and Computational Biology, 2007
2006
Lifetime aware resource management for sensor network using distributed genetic algorithm.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Design considerations for digital circuits using organic thin film transistors on a flexible substrate.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Adaptive low-power bus encoding based on weighted code mapping.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Task Merging for Dynamic Power Management of Cyclic Applications in Real-Time Multi-Processor Systems.
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Distributed genetic algorithm for energy-efficient resource management in sensor networks.
Proceedings of the Genetic and Evolutionary Computation Conference, 2006
Low-power bus encoding using an adaptive hybrid algorithm.
Proceedings of the 43rd Design Automation Conference, 2006
Workload prediction and dynamic voltage scaling for MPEG decoding.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2002
Battery-powered digital CMOS design.
IEEE Trans. Very Large Scale Integr. Syst., 2002
2001
Estimation of peak power dissipation in VLSI circuits using thelimiting distributions of extreme order statistics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Dynamic Power Management in a Mobile Multimedia System with Guaranteed Quality-of-Service.
Proceedings of the 38th Design Automation Conference, 2001
2000
Dynamic power management of complex systems using generalized stochastic Petri nets.
Proceedings of the 37th Conference on Design Automation, 2000
Low-power design of sequential circuits using a quasi-synchronous derived clock.
Proceedings of ASP-DAC 2000, 2000
An interleaved dual-battery power supply for battery-operated electronics.
Proceedings of ASP-DAC 2000, 2000
1999
Stochastic modeling of a power-managed system: construction and optimization.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999
Design Considerations for Battery-Powered Electronics.
Proceedings of the 36th Conference on Design Automation, 1999
An Integrated Battery-Hardware Model for Portable Electronics.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1998
Cycle-accurate macro-models for RT-level power analysis.
IEEE Trans. Very Large Scale Integr. Syst., 1998
Stratified random sampling for power estimation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
Maximum Power Estimation Using the Limiting Distributions of Extreme Order Statistics.
Proceedings of the 35th Conference on Design Automation, 1998
A New Design for Double Edge Triggered Flip-flops.
Proceedings of the ASP-DAC '98, 1998
1997
A Power Estimation Framework for Designing Low Power Portable Video Applications.
Proceedings of the 34st Conference on Design Automation, 1997
Statistical Estimation of the Cumulative Distribution Function for Power Dissipation in VLSI Cirucits.
Proceedings of the 34st Conference on Design Automation, 1997
A note on the relationship between signal probability and switching activity.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997
Statistical design of macro-models for RT-level power evaluation.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997
1996
Statistical sampling and regression analysis for RT-level power evaluation.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996