An Echo-Cancelling Front-End for 112Gb/s PAM-4 Simultaneous Bidirectional Signaling in 14nm CMOS.
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Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Semi Custom Design: A Case Study on SIMD Shufflers.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
A 550 Mb/s Radix-4 Bit-level Pipelined 16-State 0.25-mu m CMOS Viterbi Decoder.
Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000
A Datapath Generator for Full-Custom Macros of Iterative Logic Arrays.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997