SIGMA: a VLSI systolic array implementation of a Galois field GF(2 <sup>m</sup>) based multiplication and division algorithm.
IEEE Trans. Very Large Scale Integr. Syst., 1993
SIGMA: A VLSI Chip for Galois Field GF(2<sup>m</sup>) Based Multiplication and Division.
Proceedings of the Sixth International Conference on VLSI Design, 1993
A Systolic Algorithm and Architecture for Galois Field Arithmetic.
Proceedings of the 6th International Parallel Processing Symposium, 1992