MultiplexSAGE: A Multiplex Embedding Algorithm for Inter-Layer Link Prediction.
IEEE Trans. Neural Networks Learn. Syst., October, 2024
Gender disparities in the dissemination and acquisition of scientific knowledge.
CoRR, 2024
Higher-order modeling of face-to-face interactions.
CoRR, 2024
The dynamics of leadership and success in software development teams.
CoRR, 2024
MPXGAT: An Attention based Deep Learning Model for Multiplex Graphs Embedding.
CoRR, 2024
Complex Contagion in Social Systems with Distrust.
Adv. Complex Syst., 2024
Hypergraphx: a library for higher-order network analysis.
J. Complex Networks, April, 2023
Higher-order correlations reveal complex memory in temporal hypergraphs.
CoRR, 2023
MultiSAGE: a multiplex embedding algorithm for inter-layer link prediction.
CoRR, 2022
Assessing the robustness of decentralized gathering: a multi-agent approach on micro-biological systems.
Swarm Intell., 2020
Methodologies for automated synthesis of memory and interconnect subsystems in parallel architectures.
PhD thesis, 2015
Exploiting Concurrency for the Automated Synthesis of MPSoC Interconnects.
ACM Trans. Embed. Comput. Syst., 2015
Interplay of loop unrolling and multidimensional memory partitioning in HLS.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Improving Multibank Memory Access Parallelism with Lattice-Based Partitioning.
ACM Trans. Archit. Code Optim., 2014
Automated design space exploration for FPGA-based heterogeneous interconnects.
Des. Autom. Embed. Syst., 2014
Area implications of memory partitioning for high-level synthesis on FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Generating On-Chip Heterogeneous Systems from High-Level Parallel Code.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Design space exploration for high-level synthesis of multi-threaded applications.
J. Syst. Archit., 2013
Automated synthesis of FPGA-based heterogeneous interconnect topologies.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Efficient and scalable OpenMP-based system-level design.
Proceedings of the Design, Automation and Test in Europe, 2013