2023
MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures.
,
,
,
,
,
,
,
,
,
,
,
,
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023
2021
DAPPLE: a pipelined data parallel approach for training large models.
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the PPoPP '21: 26th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2021
2020
Algorithmic Fault Detection for RRAM-based Matrix Operations.
ACM Trans. Design Autom. Electr. Syst., 2020
Low Bit-Width Convolutional Neural Network on RRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
2019
Fault-Tolerant Training Enabled by On-Line Fault Detection for RRAM-Based Neural Computing Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
TIME: A Training-in-Memory Architecture for RRAM-Based Deep Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
Ouroboros: An Inference Engine for Deep Learning Based TTS on Embedded Devices.
Proceedings of the 2019 IEEE Hot Chips 31 Symposium (HCS), 2019
PAI-FCNN: FPGA Based CNN Inference System.
,
,
,
,
,
,
,
,
,
,
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019
A Configurable Multi-Precision CNN Computing Framework Based on Single Bit RRAM.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Fault tolerance in neuromorphic computing systems.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
PAI-FCNN: FPGA Based Inference System for Complex CNN Models.
,
,
,
,
,
,
,
,
,
,
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019
2018
MNSIM: Simulation Platform for Memristor-Based Neuromorphic Computing System.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Stuck-at Fault Tolerance in RRAM Computing Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
Low power driven loop tiling for RRAM crossbar-based CNN.
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018
Fault Tolerance for RRAM-Based Matrix Operations.
Proceedings of the IEEE International Test Conference, 2018
Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method.
Proceedings of the International Conference on Computer-Aided Design, 2018
Design of fault-tolerant neuromorphic computing systems.
Proceedings of the 23rd IEEE European Test Symposium, 2018
A peripheral circuit reuse structure integrated with a retimed data flow for low power RRAM crossbar-based CNN.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Rescuing memristor-based computing with non-linear resistance levels.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Long live TIME: improving lifetime for training-in-memory engines by structured gradient sparsification.
Proceedings of the 55th Annual Design Automation Conference, 2018
Training low bitwidth convolutional neural network on RRAM.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Fault-Tolerant Training with On-Line Fault Detection for RRAM-Based Neural Computing Systems.
Proceedings of the 54th Annual Design Automation Conference, 2017
TIME: A Training-in-memory Architecture for Memristor-based Deep Neural Networks.
Proceedings of the 54th Annual Design Automation Conference, 2017
Binary convolutional neural network on RRAM.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
Computation-oriented fault-tolerance schemes for RRAM computing systems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication.
J. Comput. Sci. Technol., 2016
Low power Convolutional Neural Networks on a chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
MNSIM: Simulation platform for memristor-based neuromorphic computing system.
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Sparsity-oriented sparse solver design for circuit simulation.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Switched by input: power efficient structure for RRAM-based convolutional neural network.
Proceedings of the 53rd Annual Design Automation Conference, 2016
RRAM based learning acceleration.
Proceedings of the 2016 International Conference on Compilers, 2016
2015
Energy Efficient RRAM Spiking Neural Network for Real Time Classification.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
Spiking neural network with RRAM: can we use it for real-world application?
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Merging the interface: power, area and accuracy co-optimization for RRAM crossbar-based mixed-signal computing system.
Proceedings of the 52nd Annual Design Automation Conference, 2015
An accurate and low-cost PM2.5 estimation method based on Artificial Neural Network.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015