A calibration scheme for SAR ADCs based on capacitor weight optimization using an improved simulated annealing algorithm.

A 14-bit 750 MS/s energy-efficient pipelined ADC for MEMS LiDAR system.

Area and timing optimized 8B/10B pretreating and decoding circuit for JESD204B controller.

An all-digital low-complexity blind background calibration of timing mismatch in time-interleaved ADCs.

A fast-convergence, tree-structured, fully-parallel digital background timing mismatch calibration method for four-channel TIADC based on perfect reconstruction filter bank.

An Adaptive and Universal Timing Mismatch Estimation Method for TIADCs.