Session 7 overview: Nonvolatile memory solutions.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming.
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IEEE J. Solid State Circuits, 2015
19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming.
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Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Adaptive Multi-Pulse Program Scheme Based on Tunneling Speed Classification for Next Generation Multi-Bit/Cell NAND FLASH.
IEEE J. Solid State Circuits, 2013
Session 12 overview: Non-volatile memory solutions.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
F2: VLSI power-management techniques: Principles and applications.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface.
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IEEE J. Solid State Circuits, 2012
A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory.
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Proceedings of the Symposium on VLSI Circuits, 2012
A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology.
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Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology.
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Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth.
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IEEE J. Solid State Circuits, 1996