2019
Breaking Randomized Mixed-Radix Scalar Multiplication Algorithms.
Proceedings of the Progress in Cryptology - LATINCRYPT 2019, 2019
2017
Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECM.
IEEE Trans. Computers, 2017
2014
FFS Factory: Adapting Coppersmith's "Factorization Factory" to the Function Field Sieve.
IACR Cryptol. ePrint Arch., 2014
Discrete Logarithm in GF(2809) with FFS.
Proceedings of the Public-Key Cryptography - PKC 2014, 2014
2013
Relation collection for the Function Field Sieve.
IACR Cryptol. ePrint Arch., 2013
Discrete logarithm in GF(2<sup>809</sup>) with FFS.
IACR Cryptol. ePrint Arch., 2013
2012
Finding Optimal Formulae for Bilinear Maps.
IACR Cryptol. ePrint Arch., 2012
2011
Fast Architectures for the \eta_T Pairing over Small-Characteristic Supersingular Elliptic Curves.
IEEE Trans. Computers, 2011
Ballot stuffing in a postal voting system.
Proceedings of the 2011 International Workshop on Requirements Engineering for Electronic Voting Systems, 2011
2010
A Low-Area yet Performant FPGA Implementation of Shabal.
IACR Cryptol. ePrint Arch., 2010
Optimal Eta Pairing on Supersingular Genus-2 Binary Hyperelliptic Curves.
IACR Cryptol. ePrint Arch., 2010
Accelerating Lattice Reduction with FPGAs.
Proceedings of the Progress in Cryptology, 2010
2009
Fast Architectures for the eta<sub>T</sub> Pairing over Small-Characteristic Supersingular Elliptic Curves.
IACR Cryptol. ePrint Arch., 2009
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers.
IACR Cryptol. ePrint Arch., 2009
2008
Fonctions élémentaires en virgule flottante pour les accélérateurs reconfigurables.
Tech. Sci. Informatiques, 2008
Algorithms and Arithmetic Operators for Computing the etaT Pairing in Characteristic Three.
IEEE Trans. Computers, 2008
A Comparison Between Hardware Accelerators for the Modified Tate Pairing over F<sub>2<sup>m</sup></sub> and F<sub>3<sup>m</sup></sub>.
IACR Cryptol. ePrint Arch., 2008
When FPGAs are better at floating-point than microprocessors.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008
2007
A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic.
J. VLSI Signal Process., 2007
Parameterized floating-point logarithm and exponential functions for FPGAs.
Microprocess. Microsystems, 2007
Algorithms and Arithmetic Operators for Computing the eta<sub>T</sub> Pairing in Characteristic Three.
IACR Cryptol. ePrint Arch., 2007
Arithmetic Operators for Pairing-Based Cryptography.
IACR Cryptol. ePrint Arch., 2007
Floating-Point Trigonometric Functions for FPGAs.
Proceedings of the FPL 2007, 2007
Return of the hardware floating-point elementary function.
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 2007
2006
Floating Point or LNS: Choosing the Right Arithmetic on an Aapplication Basis.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
2005
Outils pour une comparaison sans <i>a priori</i> entre arithmétique logarithmique et arithmétique flottante.
Tech. Sci. Informatiques, 2005
A Parameterized Floating-Point Exponential Function for FPGAs.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005
Table-based polynomials for fast hardware function evaluation.
Proceedings of the 16th IEEE International Conference on Application-Specific Systems, 2005
2004
Second Order Function Approximation Using a Single Multiplication on FPGAs.
Proceedings of the Field Programmable Logic and Application, 2004
2002
Multipartite Tables in JBits for the Evaluation of Functions on FPGAs.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002