Gate-Level Side-Channel Leakage Ranking With Architecture Correlation Analysis.
IEEE Trans. Emerg. Top. Comput., 2024
Improving CPU Fault Injection Simulations: Insights from RTL to Instruction-Level Models.
Proceedings of the Workshop on Fault Detection and Tolerance in Cryptography, 2024
Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.
,
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
Invited: Pre-silicon Side Channel and Fault Analysis.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Gate-Level Side-Channel Leakage Assessment with Architecture Correlation Analysis.
CoRR, 2022
Rewrite to Reinforce: Rewriting the Binary to Apply Countermeasures against Fault Injection.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Verification of Power-based Side-channel Leakage through Simulation.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020