Decompressors using nonlinear codes.
Microprocess. Microsystems, 2020
A Low-Power Fast Settling 5.4 - 8.4 GHz Digitally Controlled Oscillator in 45 nm RFSOI CMOS.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
A 53-Gbit/s Optical Receiver Frontend With 0.65 pJ/bit in 28-nm Bulk-CMOS.
IEEE J. Solid State Circuits, 2019
A Mixed-Signal Offset-Compensation System for Multi-Gbit/s Optical Receiver Frontends.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Offset-Compensation Systems for Multi-Gbit/s Optical Receivers.
Proceedings of the VLSI-SoC: New Technology Enabler, 2019
A 90 μW, 2.5 GHz high linearity programmable delay cell for signal duty-cycle adjustment.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Combinational Decompressors with Nonlinear Codes.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019
A 4×45 Gb/s Two-Tap FFE VCSEL Driver in 14-nm FinFET CMOS Suitable for Burst Mode Operation.
IEEE J. Solid State Circuits, 2018
4×40 Gb/s 2 pJ/bit Optical RX with 8ns Power-on and CDR-Lock Time in 14nm CMOS.
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Proceedings of the Optical Fiber Communications Conference and Exposition, 2018
Opto-electrical analog front-end with rapid power-on and 0.82 pJ/bit for 28 Gb/s in 14 nm FinFET CMOS.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Adaptive high-speed and ultra-low power optical interconnect for data center communications.
Proceedings of the 2017 19th International Conference on Transparent Optical Networks (ICTON), 2017
Implementation of Low-Power 6-8 b 30-90 GS/s Time-Interleaved ADCs With Optimized Input Bandwidth in 32 nm CMOS.
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IEEE J. Solid State Circuits, 2016
A 110 mW 6 bit 36 GS/s interleaved SAR ADC for 100 GBE occupying 0.048 mm<sup>2</sup> in 32 nm SOI CMOS.
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Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014