3D IGZO Charge-Coupled Memory DTCO & STCO Analysis for Compute-near-Memory Applications.
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Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
Framework for Augmenting Main Memory with CXL-connected Emerging Memory Alternatives.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025
Accurate off-current evaluation by parasitic capacitance extraction in capacitor-less DRAM cells.
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Proceedings of the IEEE International Memory Workshop, 2025
Exploring Pareto-Optimal Hybrid Main Memory Configurations Using Different Emerging Memories.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023
Enhanced data integrity of In-Ga-Zn-Oxide based Capacitor-less 2T memory for DRAM applications.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021
Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks.
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Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018