2025
Conflict Management in Vector Register Files.
ACM Trans. Archit. Code Optim., March, 2025
2024
Efficient Handover Mode Synchronization for NR-REDCAP on a Vector DSP.
J. Signal Process. Syst., October, 2024
Access Interval Prediction by Partial Matching for Tightly Coupled Memory Systems.
Int. J. Parallel Program., April, 2024
Box Decoding: A Low-Complexity Algorithm for MIMO Detection.
Proceedings of the IEEE Workshop on Signal Processing Systemsm, 2024
Implementation of the Tagged Geometric History Length Access Interval Predictor.
Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
ZuSE-KI-Mobil AI Chip Design Platform: An Overview.
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Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024
On the Concurrent Multipath Entanglement Distribution in Quantum Networks.
Proceedings of the 2024 IEEE Global Communications Conference, 2024
A 22 nm 10 TOPS Mixed-Precision Neural Network SoC for Image Processing with Energy-Efficient Dilated Convolution Support.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2024
2023
On-Chip Memory Access Reduction for Energy-Efficient Dilated Convolution Processing.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2023
Energy-Efficient Virtual Optical Network Embedding Over Mixed-Grid Optical Networks.
Proceedings of the IEEE Conference on Network Function Virtualization and Software Defined Networks, 2023
Lightweight Instruction Set for Flexible Dilated Convolutions and Mixed-Precision Operands.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Energy Efficiency Analysis of RF Power Amplifier Digital Predistortion in Full-Digital MIMO Transmitters.
Proceedings of the IEEE International Conference on Communications, 2023
Access Interval Prediction with Neural Networks for Tightly Coupled Memory Systems.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
The ZuSE-KI-Mobil AI Accelerator SoC: Overview and a Functional Safety Perspective.
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Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Dual Vector Load for Improved Pipelining in Vector Processors.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2023
Optimal SDNR Digital Predistortion via Direct Inversion.
Proceedings of the 57th Asilomar Conference on Signals, Systems, and Computers, ACSSC 2023, Pacific Grove, CA, USA, October 29, 2023
2022
Accurate Estimation of Service Rates in Interleaved Scratchpad Memory Systems.
ACM Trans. Embed. Comput. Syst., 2022
Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory Systems.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
Communications Signal Processing Using RISC-V Vector Extension.
Proceedings of the 2022 International Wireless Communications and Mobile Computing, 2022
Efficient Synchronization for NR-REDCAP Implemented on a Vector DSP.
Proceedings of the 33rd IEEE International Conference on Application-specific Systems, 2022
2021
Channel Estimation for Advanced 5G/6G Use Cases on a Vector Digital Signal Processor.
IEEE Open J. Circuits Syst., 2021
Energy efficiency optimization of radiofrequency power amplifiers for massive MIMO: a data based approach.
Proceedings of the 22nd IEEE International Workshop on Signal Processing Advances in Wireless Communications, 2021
Digital Predistortion with Compressed Observations for Cloud-Based Learning.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021
Flexible Channel Estimation for 3GPP 5G IoT on a Vector Digital Signal Processor.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021
Minimized Region of Path-search Algorithm for ASIP-based Connection Allocator in NoCs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
2020
High Performance Dynamic Resource Allocation for Guaranteed Service in Network-on-Chips.
IEEE Trans. Emerg. Top. Comput., 2020
Slicing FIFOs for On-Chip Memory Bandwidth Exhaustion.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Blind Packet-Based Receiver Chain Optimization Using Machine Learning.
Proceedings of the 2020 IEEE Wireless Communications and Networking Conference, 2020
Channel Profile Independent Usage of Convolutional Neural Networks for Receiver Chain Optimization.
Proceedings of the IEEE Latin-American Conference on Communications, 2020
Path-Spreading Search Algorithm and ASIP Approach for Connection Allocation in TDM-NoCs.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Modem Design in the Era of 5G and Beyond: The Need for a Formal Approach.
Proceedings of the 27th International Conference on Telecommunications, 2020
An ASIP Approach to Path Allocation in TDM NoCs using Adaptive Search Region.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Low Complexity Convolutional Neural Networks for Wireless Receiver Chain Optimization.
Proceedings of the 14th IEEE International Conference on Advanced Networks and Telecommunications Systems, 2020
Balancing Dynamic Scheduling Overhead to Maximize SDF Performance.
Proceedings of the 2nd 6G Wireless Summit, 2020
Scalable 5G Signal Processing on Multiprocessor System: A Clustering Approach.
Proceedings of the 3rd IEEE 5G World Forum, 2020
2019
Towards GFDM for Handsets - Efficient and Scalable Implementation on a Vector DSP.
Proceedings of the 90th IEEE Vehicular Technology Conference, 2019
Probabilistic Models for Off-Line Arbiters in Embedded Systems.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
5G-and-Beyond Scalable Machines.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Application Specific Instruction Processor for Dynamic Connection Allocation in TDM-NoCs.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019
Access Interval Prediction for Tightly Coupled Memory Systems.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019
A Hybrid Execution Approach to Improve the Performance of Dataflow Applications.
Proceedings of the 2019 International SoC Design Conference, 2019
General Multicarrier Modulation Hardware Accelerator for the Internet of Things.
Proceedings of the 2019 IEEE Global Communications Conference, 2019
Queue Based Memory Management Unit for Heterogeneous MPSoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Statistical Access Interval Prediction for Tightly Coupled Memory Systems.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019
A Low-Power Scalable Signal Processing Chip Platform for 5G and Beyond - Kachel.
Proceedings of the 53rd Asilomar Conference on Signals, Systems, and Computers, 2019
DF4CRAN: Dataflow Framework for Cloud-RAN Signal Processing.
Proceedings of the 2nd IEEE 5G World Forum, 5GWF 2019, Dresden, Germany, September 30, 2019
2017
Register-Exchange Based Connection Allocator for Circuit Switching NoCs.
Proceedings of the 25th Euromicro International Conference on Parallel, 2017
Combined TDM and SDM Circuit Switching NoCs with Dedicated Connection Allocator.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Combined packet and TDM circuit switching NoCs with novel connection configuration mechanism.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Combined Centralized and Distributed Connection Allocation in Large TDM Circuit Switching NoCs.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications.
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Proceedings of the 54th Annual Design Automation Conference, 2017
Scalable 5G MPSoC architecture.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017
2016
A database accelerator for energy-efficient query processing and optimization.
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Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
Trellis-search based Dynamic Multi-Path Connection Allocation for TDM-NoCs.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
EUROSERVER: Share-anything scale-out micro-server design.
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Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
An MPSoC for energy-efficient database query processing.
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Proceedings of the 53rd Annual Design Automation Conference, 2016
Centralized parallel multi-path multi-slot allocation approach for TDM NoCs.
Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016
2014
Tomahawk: Parallelism and heterogeneity in communications signal processing MPSoCs.
ACM Trans. Embed. Comput. Syst., 2014
10.7 A 105GOPS 36mm<sup>2</sup> heterogeneous SDR MPSoC with energy-aware dynamic scheduling and iterative detection-decoding for 4G in 65nm CMOS.
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Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
EUROSERVER: Energy Efficient Node for European Micro-Servers.
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Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
Towards elastic SDR architectures using dynamic task management.
Proceedings of the IEEE Global Conference on Signal and Information Processing, 2013
2012
Two-stage detector for SC-FDMA transmission over MIMO ISI channels.
Proceedings of the 2012 International Symposium on Wireless Communication Systems (ISWCS), 2012
A 335Mb/s 3.9mm<sup>2</sup> 65nm CMOS flexible MIMO detection-decoding engine achieving 4G wireless data rates.
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Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
Combining LDPC, turbo and Viterbi decoders: Benefits and costs.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011
2009
On the Structured Parallelism of Decoders for LDPC Convolutional Codes - an Algebraic Description.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Vectorization of the Sphere Detection Algorithm.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
ASIP Decoder Architecture for Convolutional and LDPC Codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
ICT-Emuco. An innovative solution for future smart phones.
Proceedings of the 2009 IEEE International Conference on Multimedia and Expo, 2009
On the performance and numerical stability of soft-decision Reed-Solomon decoding.
Proceedings of the 17th European Signal Processing Conference, 2009
2008
A dual-core programmable decoder for LDPC convolutional codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
A fully programmable 40 GOPS SDR single chip baseband for LTE/WiMAX terminals.
Proceedings of the ESSCIRC 2008, 2008
Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008
2007
Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
A High-Throughput Programmable Decoder for LDPC Convolutional Codes.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007
2006
Code Generation for STA Architecture.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006
2005
A Compiler-friendly and Low-power DSP architecture.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
2004
Generated DSP Cores for Implementation of an OFDM Communication System.
Proceedings of the Computer Systems: Architectures, 2004
Synchronous Transfer Architecture (STA).
Proceedings of the Computer Systems: Architectures, 2004