Kogge-Stone Adder Realization using 1S1R Resistive Switching Crossbar Arrays.
ACM J. Emerg. Technol. Comput. Syst., 2018
Efficient complementary resistive switch-based crossbar array Booth multiplier.
Microelectron. J., 2017
Storages Are Not Forever.
Cogn. Comput., 2017
Memristive Sorting Networks Enabled by Electrochemical Metallization Cells.
Int. J. Unconv. Comput., 2016
Efficient implementation of multiplexer and priority multiplexer using 1S1R ReRAM crossbar arrays.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016
The Programmable Logic-in-Memory (PLiM) computer.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
On Passive Permutation Circuits.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
A Complementary Resistive Switch-Based Crossbar Array Adder.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
Study of Memristive Associative Capacitive Networks for CAM Applications.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015
In-memory adder functionality in 1S1R arrays.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Controllability of multi-level states in memristive device models using a transistor as current compliance during SET operation.
Proceedings of the 2015 International Joint Conference on Neural Networks, 2015
Memristor based computation-in-memory architecture for data-intensive applications.
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Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Simulation and comparison of two sequential logic-in-memory approaches using a dynamic electrochemical metallization cell model.
Microelectron. J., 2014
Simulation of TaOx-based complementary resistive switches by a physics-based memristive model.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Memristive nano-crossbar arrays enabling novel computing paradigms.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Complementary Resistive Switches.
PhD thesis, 2012
Memory Devices: Energy-Space-Time Tradeoffs.
Proc. IEEE, 2010