Scalable In-Memory Clustered Annealer With Temporal Noise of Charge Trap Transistor for Large Scale Travelling Salesman Problems.
IEEE J. Emerg. Sel. Topics Circuits Syst., March, 2023
Efficient Optimization with Higher-Order Ising Machines.
CoRR, 2022
Integer Factorization with Compositional Distributed Representations.
Proceedings of the NICE 2022: Neuro-Inspired Computational Elements Conference, 2022
Gaussian Random Number Generator with Reconfigurable Mean and Variance using Stochastic Magnetic Tunnel Junctions.
CoRR, 2021
Physics-Based Models for Magneto-Electric Spin-Orbit Logic Circuits.
CoRR, 2021
Scalable energy-efficient magnetoelectric spin-orbit logic.
Nat., 2019
A Coupled CMOS Oscillator Array for 8ns and 55pJ Inference in Convolutional Neural Networks.
CoRR, 2019
Convolution Inference via Synchronization of a Coupled CMOS Oscillator Array.
CoRR, 2019
Benchmarking Physical Performance of Neural Inference Circuits.
CoRR, 2019
An Energy-Efficient Classifier via Boosted Spin Channel Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Compact Modeling and Design of Magneto-Electric Transistor Devices and Circuits.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Hybrid piezoelectric-magnetic neurons: a proposal for energy-efficient machine learning.
Proceedings of the ACMSE 2018 Conference, Richmond, KY, USA, March 29-31, 2018, 2018
Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation.
CoRR, 2017
Shannon-inspired Statistical Computing to Enable Spintronics.
CoRR, 2017
Principles and trends in quantum nano-electronics and nano-magnetics for beyond-CMOS computing.
Proceedings of the 47th European Solid-State Device Research Conference, 2017
A Systems Approach to Computing in Beyond CMOS Fabrics: Invited.
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Proceedings of the 54th Annual Design Automation Conference, 2017
Low-power Spin Valve Logic using Spin-transfer Torque with Automotion of Domain Walls.
CoRR, 2016
Experimental Demonstration of Efficient Spin-Orbit Torque Switching of an MTJ with sub-100 ns Pulses.
CoRR, 2015
Static and Clocked Spintronic Circuit Design and Simulation With Performance Analysis Relative to CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
Convolutional Networks for Image Processing by Coupled Oscillator Arrays.
CoRR, 2014
Overview of Beyond-CMOS Devices and a Uniform Methodology for Their Benchmarking.
Proc. IEEE, 2013
Modeling and Design of Spintronic Integrated Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
Material Targets for Scaling All Spin Logic
CoRR, 2012
All Spin Nano-magnetic State Elements
CoRR, 2012
Circuit Theory for Analysis and Design of Spintronic Integrated Circuits
CoRR, 2011
Modeling of Nanoscale Devices.
Proc. IEEE, 2008