SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models.
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CoRR, June, 2025
BugWhisperer: Fine-Tuning LLMs for SoC Hardware Vulnerability Detection.
IACR Cryptol. ePrint Arch., 2025
Physical Design-Aware Power Side-Channel Leakage Assessment Framework using Deep Learning.
IACR Cryptol. ePrint Arch., 2025
ThreatLens: LLM-guided Threat Modeling and Test Plan Generation for Hardware Security Verification.
IACR Cryptol. ePrint Arch., 2025
DL-SCADS: Deep Learning-Based Post-Silicon Side-Channel Analysis Using Decomposed Signal.
IACR Cryptol. ePrint Arch., 2025
Special Session: ThreatLens: LLM-guided Threat Modeling and Test Plan Generation for Hardware Security Verification.
Proceedings of the 43rd IEEE VLSI Test Symposium, 2025
SoCureLLM: An LLM-driven Approach for Large-Scale System-on-Chip Security Verification and Policy Generation.
IACR Cryptol. ePrint Arch., 2024
LLM for SoC Security: A Paradigm Shift.
IEEE Access, 2024
Empowering Hardware Security with LLM: The Development of a Vulnerable Hardware Database.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024
PQC-SEP: Power Side-channel Evaluation Platform for Post-Quantum Cryptography Algorithms.
IACR Cryptol. ePrint Arch., 2022
IACR Cryptol. ePrint Arch., 2022
Prediction of instantaneous likeability of advertisements using deep learning.
Cogn. Comput. Syst., 2021
Comprehensive NILM Framework: Device Type Classification and Device Activity Status Monitoring Using Capsule Network.
IEEE Access, 2020