Multibit Content Addressable Memory Design and Optimization Based on 3-D nand-Compatible IGZO Flash.
IEEE Trans. Very Large Scale Integr. Syst., August, 2024
Unveiling the Impact of AC PBTI on Hydrogen Formation in Oxide Semiconductor Transistors.
,
,
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
First Demonstration of BEOL-Compatible 3D Vertical FeNOR.
,
,
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Low-Power and Scalable BEOL-Compatible IGZO TFT eDRAM-Based Charge-Domain Computing.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023
Non-Destructive-Read 1T1C Ferroelectric Capacitive Memory Cell with BEOL 3D Monolithically Integrated IGZO Access Transistor for 4F<sup>2</sup> High-Density Integration.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
First Demonstration of Work Function-Engineered BEOL-Compatible IGZO Non-Volatile MFMIS AFeFETs and Their Co-Integration with Volatile-AFeFETs.
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical Understanding.
,
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
First Demonstration of BEOL-Compatible MFMIS Fe-FETs with 3D Multi-Fin Floating Gate: In-situ ALD-deposited MFM, LCH of 50 nm, > 2×10<sup>9</sup> Endurance, and 58.3% Area Saving.
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Boosting the Memory Window of the BEOL-Compatible MFMIS Ferroelectric/ Anti-Ferroelectric FETs by Charge Injection.
,
,
,
,
,
,
,
,
,
,
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
First Si-Waveguide-Integrated InGaAs/InAlAs Avalanche Photodiodes on SOI Platform.
,
,
,
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning Technique Achieving Record High Gm of 479.5 μS/μm (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V).
,
,
,
,
,
,
,
,
,
,
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
First Demonstration of Fully CMOS-compatible Non-volatile Programmable Photonic Switch Enabled by Ferroelectric-SOI Waveguide for Next Generation Photonic Integrated Circuit.
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
BEOL-compatible Ta/HZO/W Ferroelectric Tunnel Junction with Low Operating Voltage Targeting for Low Power Application.
,
,
,
,
,
,
,
,
,
,
Proceedings of the International Conference on IC Design and Technology, 2022
First InGaAs/InAlAs Single-Photon Avalanche Diodes (SPADs) Heterogeneously Integrated with Si Photonics on SOI Platform for 1550 nm Detection.
,
,
,
,
,
,
,
,
,
,
,
,
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Performance Evaluation of Static Random Access Memory (SRAM) based on Negative Capacitance FinFET.
Proceedings of the International Conference on IC Design and Technology, 2019