The effect of page allocation on caches.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992
Translation hint buffers to reduce access time of physically-addressed instruction caches.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992
Strategies for Branch Target Buffers.
Proceedings of the 24th Annual IEEE/ACM International Symposium on Microarchitecture, 1991
The Computer Architect's Workbench.
Proceedings of the Information Processing 89, Proceedings of the IFIP 11th World Computer Congress, San Francisco, USA, August 28, 1989