Modelling, exploration and optimization of hardware accelerators for deep learning applications
PhD thesis, 2023
Pearl: Towards Optimization of DNN-accelerators Via Closed-Form Analytical Representation.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022
Quantifying the Benefits of Monolithic 3D Computing Systems Enabled by TFT and RRAM.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Fledge: Flexible Edge Platforms Enabled by In-memory Computing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
EAST-DNN: Expediting architectural SimulaTions using deep neural networks: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019
Floating Point Multiplication Mapping on ReRAM Based In-memory Computing Architecture.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018
MAMI: Majority and Multi-Input Logic on Memristive Crossbar Array.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
TSV-aware 3-D IC structural planning with irregular die-size.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016