Analysis of Metastability Errors in Conventional, LSB-First, and Asynchronous SAR ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
Highly time-interleaved noise-shaped SAR ADC with reconfigurable order.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A sub-nW mV-range programmable threshold comparator for near-zero-energy sensing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Practical modeling of comparator metastability for conventional and LSB-first SAR ADCs.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015
A ΔΣ ADC using an LSB-first SAR quantizer.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Selectable starting bit SAR ADC.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Analysis of metastability errors in asynchronous SAR ADCs.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
Bit-error-rate analysis and mixed signal triple modular redundancy methods for data converters.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
A fully automated verilog-to-layout synthesized ADC demonstrating 56dB-SNDR with 2MHz-BW.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
Stochastic approximation register ADC.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
LSB-first SAR ADC with bit-repeating for reduced energy consumption.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Analysis and performance trade-offs of linearity calibration for stochastic ADCs.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
Resistive correction of low output impedance high-speed current-steering DACs.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
A 10-b Ternary SAR ADC With Quantization Time Information Utilization.
IEEE J. Solid State Circuits, 2012
A 10b Ternary SAR ADC with decision time quantization based redundancy.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011