Aurangozeb

According to our database, Aurangozeb authored at least 17 papers between 2015 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Low-Latency Burst Error Detection and Correction in Decision-Feedback Equalization.

Shovon Dey, Aurangozeb, Masum Hossain

IEEE Open J. Circuits Syst., 2021

2020

Sequence-Coded Multilevel Signaling for High-Speed Interface.

Aurangozeb, Carson R. Dick, Maruf Mohammad, Masum Hossain

IEEE J. Solid State Circuits, 2020

2019

DDJ-Adaptive SAR TDC-Based Timing Recovery for Multilevel Signaling.

Masum Hossain, Aurangozeb, Nhat Nguyen

IEEE J. Solid State Circuits, 2019

Broadband-Tunable Cascaded Vernier Silicon Photonic Microring Filter with Temperature Tracking.

Yang Ren, David Perron, Aurangozeb, Zhiping Jiang, Masum Hossain, Vien Van

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

Affordable Sequence Decoding Techniques for High Speed SerDes.

Zarraf Huda, Shovon Dey, Aaron Monai, Aurangozeb, Masum Hossain

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A 32Gb/s 2.9pJ/b Transceiver for Sequence-Coded PAM-4 Signalling with 4-to-6dB SNR Gain in 28nm FDSOI CMOS.

Aurangozeb, Carson R. Dick, Maruf Mohammad, Masum Hossain

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018

Analog to Sequence Converter-Based PAM-4 Receiver With Built-In Error Correction.

Aurangozeb, Maruf Mohammad, Masum Hossain

IEEE J. Solid State Circuits, 2018

Channel-Adaptive ADC and TDC for 28 Gb/s PAM-4 Digital Receiver.

Aurangozeb, A. K. M. Delwar Hossain, Maruf Mohammad, Masum Hossain

IEEE J. Solid State Circuits, 2018

Burst Mode Optical Receiver With 10 ns Lock Time Based on Concurrent DC Offset and Timing Recovery Technique.

A. K. M. Delwar Hossain, Aurangozeb, Masum Hossain

JOCN, 2018

A Bimodal (NRZ/PAM-4) ISI Tolerant Timing Recovery with Adaptive DDJ Equalization.

Masum Hossain, Aurangozeb, Nhat Nguyen

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

Time-Domain Arithmetic Logic Unit With Built-In Interconnect.

Aurangozeb, A. K. M. Delwar Hossain, Can Ni, Quazi Sharar, Masum Hossain

IEEE Trans. Very Large Scale Integr. Syst., 2017

Fractional-N DPLL-Based Low-Power Clocking Architecture for 1-14 Gb/s Multi-Standard Transmitter.

Masum Hossain, Waleed El-Halwagy, A. K. M. Delwar Hossain, Aurangozeb

IEEE J. Solid State Circuits, 2017

Channel adaptive ADC and TDC for 28 Gb/s PAM-4 digital receiver.

Aurangozeb, A. K. M. Delwar Hossain, Masum Hossain

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A 82 mW 28 Gb/s PAM-4 digital sequence decoder with built-in error correction in 28nm FDSOI.

Masum Hossain, Aurangozeb, A. K. M. Delwar Hossain, Maruf Mohammad

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016

A 35 mW 10 Gb/s ADC-DSP less direct digital sequence detector and equalizer in 65nm CMOS.

A. K. M. Delwar Hossain, Aurangozeb, Maruf Mohammad, Masum Hossain

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

Fractional-N DPLL based low power clocking architecture for 1-14 Gb/s multi-standard transmitter.

Masum Hossain, Amlan Nag, Waleed El-Halwagy, A. K. M. Delwar Hossain, Aurangozeb

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015

A 6-bit 2.5-GS/s Time-Interleaved Analog-to-Digital Converter Using Resistor-Array Sharing Digital-to-Analog Converter.

Hokyu Lee, Aurangozeb, Sejin Park, Jintae Kim, Chulwoo Kim

IEEE Trans. Very Large Scale Integr. Syst., 2015