Augusto Manuel Marques

According to our database1, Augusto Manuel Marques authored at least 9 papers between 1998 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

1999
A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications.
IEEE J. Solid State Circuits, 1999

1998
Theory of PLL fractional-N frequency synthesizers.
Wirel. Networks, 1998

A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range.
IEEE J. Solid State Circuits, 1998

A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technology.
IEEE J. Solid State Circuits, 1998

A 12-bit intrinsic accuracy high-speed CMOS DAC.
IEEE J. Solid State Circuits, 1998

Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

Settling time analysis of third order systems.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A current steering architecture for 12-bit high-speed D/A converters.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A 12 bit 200 MHz low glitch CMOS D/A converter.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998


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