Augusli Kifli

According to our database, Augusli Kifli authored at least 12 papers between 1992 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

SoC test integration platform.

Augusli Kifli, Kun-Cheng Wu

Proceedings of the VLSI Design, Automation and Test, 2015

2010

Test cycle power optimization for scan-based designs.

Kun-Han Tsai, Yu Huang, Wu-Tung Cheng, Ting-Pu Tai, Augusli Kifli

Proceedings of the 2011 IEEE International Test Conference, 2010

A scalable quantitative measure of IR-drop effects for scan pattern generation.

Meng-Fan Wu, Kun-Han Tsai, Wu-Tung Cheng, Hsin-Cheih Pan, Jiun-Lang Huang, Augusli Kifli

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

2009

Power scan: DFT for power switches in VLSI designs.

Bing-Chuan Bai, Chien-Mo James Li, Augusli Kifli, Even Tsai, Kun-Cheng Wu

Proceedings of the 2009 IEEE International Test Conference, 2009

A Practical DFT Approach for Complex Low Power Designs.

Augusli Kifli, Y. W. Chen, Yu-Wen Tsai, Kun-Cheng Wu

Proceedings of the Eighteentgh Asian Test Symposium, 2009

Fault modeling and testing of retention flip-flops in low power designs.

Bing-Chuan Bai, Augusli Kifli, Chien-Mo James Li, Kun-Cheng Wu

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

High Quality Pattern Generation for Delay Defects with Functional Sensitized Paths.

Ming-Ting Hsieh, Shun-Yen Lu, Jing-Jia Liou, Augusli Kifli

Proceedings of the 17th IEEE Asian Test Symposium, 2008

1997

Embedded software in real-time signal processing systems: design technologies.

Gert Goossens, Johan Van Praet, Dirk Lanneer, Werner Geurts, Augusli Kifli, Clifford Liem, Pierre G. Paulin

Proc. IEEE, 1997

1995

Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures.

Gert Goossens, Dirk Lanneer, Marc Pauwels, Francis Depuydt, Koen Schoofs, Augusli Kifli, Marco Cornero, Paolo Petroni, Francky Catthoor, Hugo De Man

J. VLSI Signal Process., 1995

A unified scheduling model for high-level synthesis and code generation.

Augusli Kifli, G. Goosens, Hugo De Man

Proceedings of the 1995 European Design and Test Conference, 1995

1994

Chess: retargetable code generation for embedded DSP processors.

Dirk Lanneer, Johan Van Praet, Augusli Kifli, Koen Schoofs, Werner Geurts, Filip Thoen, Gert Goossens

Proceedings of the Code Generation for Embedded Processors [Dagstuhl Workshop, Dagstuhl, Germany, August 31, 1994

1992

Flag/Condition Handling and Branch Assignment for Large Microcoded Controllers.

Augusli Kifli, R. De Wulf, J. Zegers, Gert Goossens, Paul Six, Hugo De Man

Proceedings of the Synthesis for Control Dominated Circuits, 1992