Atul Katoch
According to our database1,
Atul Katoch
authored at least 13 papers
between 2003 and 2023.
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2023
A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2017
12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2005
Active Noise Cancellation Using Aggressor-Aware Clamping Circuit for Robust On-Chip Communication.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
Proceedings of the Integrated Circuit and System Design, 2004
Impact of ECCs on Simultaneously Switching Output Noise for On-Chip Busses of High Reliability Systems.
Proceedings of the 10th IEEE International On-Line Testing Symposium (IOLTS 2004), 2004
Adaptive threshold scheme to operate long on-chip buses at the limit of signal integrity.
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
2003
Aggressor aware repeater circuits for improving on-chip bus performance and robustness.
Proceedings of the ESSCIRC 2003, 2003