Atsushi Yoshikawa

Affiliations:
  • Renesas Technology Corporation, Tokyo, Japan
  • Mitsubishi Electric Corporation, Japan (2000 - 2003)
  • Microelectronics Research Laboratories, NEC Corporation, Kanagawa, Japan (1996 - 2000)


According to our database1, Atsushi Yoshikawa authored at least 2 papers between 1997 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2008
Clock-Skew Test Module for Exploring Reliable Clock-Distribution Under Process and Global Voltage-Temperature Variations.
IEEE Trans. Very Large Scale Integr. Syst., 2008

1997
A diagnosis method for single logic design errors in gate-level combinational circuits.
Syst. Comput. Jpn., 1997


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