Atsushi Miyanishi

According to our database, Atsushi Miyanishi authored at least 4 papers between 1994 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

40nm Ultra-low leakage SRAM at 170 deg.C operation for embedded flash MCU.

Yoshisato Yokoyama, Yuichiro Ishii, Hidemitsu Kojima, Atsushi Miyanishi, Yoshiki Tsujihashi, Shinobu Asayama, Kazutoshi Shiba, Koji Tanaka, Tatsuya Fukuda, Koji Nii, Kazumasa Yanagisawa

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

40 nm Dual-port and two-port SRAMs for automotive MCU applications under the wide temperature range of -40 to 170°C with test screening against write disturb issues.

Yoshisato Yokoyama, Yuichiro Ishii, Koji Tanaka, Tatsuya Fukuda, Yoshiki Tsujihashi, Atsushi Miyanishi, Shinobu Asayama, Keiichi Maekawa, Kazutoshi Shiba, Koji Nii

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

1999

A 5.3-GB/s embedded SDRAM core with slight-boost scheme.

Akira Yamazaki, Tadato Yamagata, Makoto Hatakenaka, Atsushi Miyanishi, Isao Hayashi, Shigeki Tomishima, Atsuo Mangyo, Yoshio Yukinari, Takashi Tatsumi, Masashi Matsumura, Kazutami Arimoto, Michihiro Yamada

IEEE J. Solid State Circuits, 1999

1994

A high-density data-path generator with stretchable cells.

Yoshiki Tsujihashi, Hisashi Matsumoto, Hidekatsu Nishimaki, Atsushi Miyanishi, Hiroomi Nakao, Osamu Kitada, Shuhei Iwade, Shinpei Kayano, Masayoshi Sakao

IEEE J. Solid State Circuits, January, 1994