Atsufumi Shibayama

According to our database, Atsufumi Shibayama authored at least 3 papers between 1993 and 1997.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1997

Verification of asynchronous logic circuit design using process algebra.

Tomohiro Yoneda, Atsufumi Shibayama, Takashi Nanya

Syst. Comput. Jpn., 1997

A 1.5-W single-chip MPEG-2 MP@ML video encoder with low power motion estimation and clocking.

Masayuki Mizuno, Yasushi Ooi, Naoya Hayashi, Junichi Goto, Masatoshi Hozumi, Koichiro Furuta, Atsufumi Shibayama, Yoetsu Nakazawa, Osamu Ohnishi, Shu-Yu Zhu, Yutaka Yokoyama, Yoichi Katayama, Hideto Takano, Noriyuki Miki, Yuzo Senda, Ichiro Tamitani, Masakazu Yamashina

IEEE J. Solid State Circuits, 1997

1993

Efficient Verification of Parallel Real-Time Systems.

Tomohiro Yoneda, Atsufumi Shibayama, Bernd-Holger Schlingloff, Edmund M. Clarke

Proceedings of the Computer Aided Verification, 5th International Conference, 1993