Atila Alvandpour

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

A Low-Power Battery Charge and Discharge Protection Circuit for Bio-Implantable Sensors in 65nm CMOS.

[BibT_eX]

[DOI]

Seyed Ruhallah Qasemi

Maryam Rafati

Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024

2023

Ultra Low Power ASK Demodulator/Manchester Decoder for Biomedical Applications.

[BibT_eX]

[DOI]

Wei Cao

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

Extending Wireless Power Transfer Range for Self-Powered Micro Devices with mm-size Antenna.

[BibT_eX]

[DOI]

Natachai Terawatsakul

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level Fidelity.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A Parallel-Path Amplifier for Fast Output Settling.

[BibT_eX]

[DOI]

Javad Bagheri Asli

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A Review on Current-Steering DAC Design.

[BibT_eX]

[DOI]

Xian Yang Lim

Wu Cong Lim

Boon Chiat Terence Teo

Venkadasamy Navaneethan

Proceedings of the International Conference on Electronics, Information, and Communication, 2023

2022

A Dynamic Range Extension Technique for Pseudo-Resistive Transimpedance Amplifiers Based on Two-Step Conversion.

[BibT_eX]

[DOI]

Maryam Rafati

Seyed Ruhallah Qasemi

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022

Comparative Analysis of CMOS Latch-Driver Circuits for Current-Steering Digital-to-Analog Converters.

[BibT_eX]

[DOI]

Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022

2021

A digital switching scheme to reduce DAC glitches using code-dependent randomization.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021

2020

A 10b 1GS/s Inverter-Based Pipeline ADC in 65nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020

A Low Power Front-end for Biomedical Fluorescence Sensing Applications.

[BibT_eX]

[DOI]

Seyed Ruhallah Qasemi

Maryam Rafati

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020

A 10-bit 3.75-GS/s Binary-Weighted DAC with 58.6-pJ Energy Consumption in 65-nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020

2018

Challenges for Miniaturised Energy Harvesting Sensor Systems.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Advanced Infocomm Technology, 2018

2017

Self-oscillating multilevel switched-capacitor DC/DC converter for energy harvesting.

[BibT_eX]

[DOI]

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

Ring-oscillator-based timing generator for ultralow-power applications.

[BibT_eX]

[DOI]

Pavel Angelov

Martin Nielsen-Lönn

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

2016

A 12.5-ENOB 10-kS/s Redundant SAR ADC in 65-nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2016

A 0.4-V Subnanowatt 8-Bit 1-kS/s SAR ADC in 65-nm CMOS for Wireless Sensor Applications.

[BibT_eX]

[DOI]

Prakash Harikumar

IEEE Trans. Circuits Syst. II Express Briefs, 2016

Asynchronous clock generator for a 14-bit two-stage pipelined SAR ADC in 0.18 μm CMOS.

[BibT_eX]

[DOI]

Martin Nielsen-Lönn

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Design of a gain-stage for pipelined SAR ADC using capacitive charge pump.

[BibT_eX]

[DOI]

Proceedings of the 2016 MIXDES, 2016

VCO-based ADCs for IoT applications.

[BibT_eX]

[DOI]

Vishnu Unnikrishnan

Mark Vesterbacka

Proceedings of the International Symposium on Integrated Circuits, 2016

Capacitive charge pump gain-stage with source follower buffers for pipelined SAR ADCs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Integrated Circuits, 2016

2015

Monte Carlo-Free Prediction of Spurious Performance for ECDLL-Based Synthesizers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Effect of Clock Duty-Cycle Error on Two-Channel Interleaved ΔΣ DACs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2015

An 11 GS/s 1.1 GHz Bandwidth Interleaved ΔΣ DAC for 60 GHz Radio in 65 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2015

An ultra-low-voltage OTA in 28 nm UTBB FDSOI CMOS using forward body bias.

[BibT_eX]

[DOI]

Prakash Harikumar

Proceedings of the Nordic Circuits and Systems Conference, 2015

Power analysis for two-stage high resolution pipeline SAR ADC.

[BibT_eX]

[DOI]

Quoc-Tai Duong

Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Design of efficient CMOS rectifiers for integrated piezo-MEMS energy-harvesting power management systems.

[BibT_eX]

[DOI]

Proceedings of the European Conference on Circuit Theory and Design, 2015

A fully-differential OTA in 28 nm UTBB FDSOI CMOS for PGA applications.

[BibT_eX]

[DOI]

Prakash Harikumar

Proceedings of the European Conference on Circuit Theory and Design, 2015

2014

Analysis and Calibration of Nonbinary-Weighted Capacitive DAC for High-Resolution SAR ADCs.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2014

Low-Power DT ΔΣ Modulators Using SC Passive Filters in 65 nm CMOS.

[BibT_eX]

[DOI]

Fahad Qazi

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Modeling and Analysis of Harmonic Spurs in DLL-Based Frequency Synthesizers.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

Design considerations for interface circuits to low-voltage piezoelectric energy harvesters.

[BibT_eX]

[DOI]

Martin Nielsen-Lönn

Proceedings of the 2014 NORCHIP, Tampere, Finland, October 27-28, 2014, 2014

A self-calibration technique for fast-switching frequency-hopped UWB synthesis.

[BibT_eX]

[DOI]

Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems, 2014

A low-power direct IQ upconversion technique based on duty-cycled multi-phase sub-harmonic passive mixers for UWB transmitters.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Low noise linear and wideband transconductance amplifier design for current-mode frontend.

[BibT_eX]

[DOI]

Quoc-Tai Duong

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Timing challenges in high-speed interleaved ΔΣ DACs.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

2013

Least-Squares Phase Predistortion of a +30 dBm Class-D Outphasing RF PA in 65 nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

An 8-GS/s 200-MHz Bandwidth 68-mW ΔΣ DAC in 65-nm CMOS.

[BibT_eX]

[DOI]

Omid Esmailzadeh Najari

IEEE Trans. Circuits Syst. II Express Briefs, 2013

Low-Power Low-Voltage ΔΣ Modulator Using Switched-Capacitor Passive Filters.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013

A 0.7-V 400-nW fourth-order active-passive ΔΣ modulator with one active stage.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Highly linear open-loop output driver design for high speed capacitive DACs.

[BibT_eX]

[DOI]

Quoc-Tai Duong

Jerzy J. Dabrowski

Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013

Critical path analysis of two-channel interleaved digital MASH ΔΣ modulators.

[BibT_eX]

[DOI]

Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013

A 0.5-V 250-nW 65-dB SNDR passive ΔΣ modulator for medical implant devices.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A variable bandwidth amplifier for a dual-mode low-power ΔΣ modulator in cardiac pacemaker system.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A quadrature UWB frequency synthesizer with dynamic settling-time calibration.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012

Analysis of a 5.5-V Class-D Stage Used in +30-dBm Outphasing RF PAs in 130- and 65-nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Design and Analysis of a Class-D Stage With Harmonic Suppression.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A 53-nW 9.1-ENOB 1-kS/s SAR ADC in 0.13-µm CMOS for Medical Implant Devices.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2012

Introduction to the Special Issue on the 37th European Solid-State Circuits Conference (ESSCIRC).

[BibT_eX]

[DOI]

Patrick Reynaert

Trond Ytterdal

IEEE J. Solid State Circuits, 2012

A 2.1 µW 76 dB SNDR DT-ΔΣ modulator for medical implant devices.

[BibT_eX]

[DOI]

Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

A readout circuit for an uncooled IR camera with mismatch and self-heating compensation.

[BibT_eX]

[DOI]

Daniel Svard

Christer Jansson

Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

A process variation tolerant DLL-based UWB frequency synthesizer.

[BibT_eX]

[DOI]

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A Class-D stage with harmonic suppression and DLL-based phase generation.

[BibT_eX]

[DOI]

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A DLL-based injection-locked frequency synthesizer for WiMedia UWB.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 3-nW 9.1-ENOB SAR ADC at 0.7 V and 1 kS/s.

[BibT_eX]

[DOI]

Proceedings of the 38th European Solid-State Circuit conference, 2012

Reliability challenges in avionics due to silicon aging.

[BibT_eX]

[DOI]

Ingemar Söderquist

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

A 0.7-V 600-nW 87-dB SNDR DT-ΔΣ modulator with partly body-driven and switched op-amps for biopotential signal acquisition.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE Biomedical Circuits and Systems Conference, 2012

2011

Phase Predistortion of a Class-D Outphasing RF Amplifier in 90 nm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2011

A 2.4 GS/s, Single-Channel, 31.3 dB SNDR at Nyquist, Pipeline ADC in 65 nm CMOS.

[BibT_eX]

[DOI]

Timmy Sundström

IEEE J. Solid State Circuits, 2011

A multi-segment clocking scheme to reduce on-chip EMI.

[BibT_eX]

[DOI]

Iman Esmaeil Zadeh

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

A 53-nW 9.12-ENOB 1-kS/s SAR ADC in 0.13-μm CMOS for medical implant devices.

[BibT_eX]

[DOI]

Proceedings of the 37th European Solid-State Circuits Conference, 2011

A +32 dBm 1.85 GHz class-D outphasing RF PA in 130nm CMOS for WCDMA/LTE.

[BibT_eX]

[DOI]

Proceedings of the 37th European Solid-State Circuits Conference, 2011

Power consumption bounds for SAR ADCs.

[BibT_eX]

[DOI]

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

A programmable-bandwidth amplifier for ultra-low-power switched-capacitor application.

[BibT_eX]

[DOI]

Mostafa Savadi Osgooei

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010

EMI reduction by resonant clock distribution networks.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Reliability study of a low-voltage Class-E power amplifier in 130nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A 2.4 GS/s, 4.9 ENOB at Nyquist, single-channel pipeline ADC in 65nm CMOS.

[BibT_eX]

[DOI]

Timmy Sundström

Proceedings of the 36th European Solid-State Circuits Conference, 2010

A Class-D outphasing RF amplifier with harmonic suppression in 90nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 36th European Solid-State Circuits Conference, 2010

2009

Utilizing Process Variations for Reference Generation in a Flash ADC.

[BibT_eX]

[DOI]

Timmy Sundström

IEEE Trans. Circuits Syst. II Express Briefs, 2009

A Low-Power Digital DLL-Based Clock Generator in Open-Loop Mode.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2009

2008

A 2-GHz 7-mW digital DLL-based frequency multiplier in 90-nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC 2008, 2008

2007

Jitter Characteristic in Charge Recovery Resonant Clock Distribution.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

Clocking.

[BibT_eX]

[DOI]

Thucydides Xanthopoulos

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Comparative Analysis of Process Variation Impact on Flip-Flop Power-Performance.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

A 6.2-GFlops Floating-Point Multiply-Accumulator With Conditional Normalization.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2006

A 24-mW 0.02-mm2 1.5-GHz DLL-Based Frequency Multiplier in 130-nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

A Leakage Compensation Technique for Dynamic Latches and Flip-Flops in Nano-Scale CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006

A wide-tuning range 1.8 GHz quadrature VCO utilizing coupled ring oscillators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Curvature Compensated CMOS Bandgap with Sub 1V Supply.

[BibT_eX]

[DOI]

Kevin Tom

Proceedings of the Third IEEE International Workshop on Electronic Design, 2006

First-Harmonic Injection-Locked Ring Oscillators.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

1.56 GHz On-chip Resonant Clocking in 130nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

Structural Fault Diagnosis in Charge-Pump Based Phase-Locked Loops.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A study of injection locking in ring oscillators.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

A low clock load conditional flip-flop.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

An Extended Transition Energy Cost Model for Buses in Deep Submicron Technologies.

[BibT_eX]

[DOI]

Peter Caputa

Henrik Fredriksson

Stefan Back Andersson

Proceedings of the Integrated Circuit and System Design, 2004

A new mesochronous clocking scheme for synchronization in SoC.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A high density, low leakage, 5T SRAM for embedded caches.

[BibT_eX]

[DOI]

Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003

A 4.5-GHz 130-nm 32-KB L0 cache with a leakage-tolerant self reverse-bias bitline scheme.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2003

Low voltage sensing techniques and secondary design issues for sub-90nm caches.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC 2003, 2003

Bitline leakage equalization for sub-100nm caches.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC 2003, 2003

2002

A 130-nm 6-GHz 256 × 32 bit leakage-tolerant register file.

[BibT_eX]

[DOI]

Krishnamurthy Soumyanath

Shekhar Y. Borkar

IEEE J. Solid State Circuits, 2002

A sub-130-nm conditional keeper technique.

[BibT_eX]

[DOI]

Ram K. Krishnamurthy

Krishnamurthy Soumyanath

Shekhar Y. Borkar

IEEE J. Solid State Circuits, 2002

High-performance and low-power challenges for sub-70 nm microprocessor circuits.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

A burn-in tolerant dynamic circuit technique.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001

A low-leakage dynamic multi-ported register file in 0.13mm CMOS.

[BibT_eX]

[DOI]

Ram Krishnamurthy

Krishnamurthy Soumyanath

Shekhar Borkar

Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

A 2.8 ns 30 uW/MHz area-efficient 32-b Manchester carry-bypass adder.

[BibT_eX]

[DOI]

Henrik Eriksson

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

GLMC: interconnect length estimation by growth-limited multifold clustering.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

A leakage-tolerant multi-phase keeper for wide domino circuits.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1998

Low power and low voltage CMOS digital circuit techniques.

[BibT_eX]

[DOI]

Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Separation and extraction of short-circuit power consumption in digital CMOS VLSI circuits.

[BibT_eX]

[DOI]