Atieh Lotfi

According to our database, Atieh Lotfi authored at least 13 papers between 2011 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Optimizing Large-Scale Fault Injection Experiments through Martingale Hypothesis: A Systematic Approach for Reliability Assessment of Safety-Critical Systems.

Saurabh Hukerikar, Atieh Lotfi, Yanxiang Huang, Jason Campbell, Nirmal R. Saxena

Proceedings of the 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2024

2022

Error Model (EM) - A New Way of Doing Fault Simulation.

Nirmal R. Saxena, Atieh Lotfi

Proceedings of the IEEE International Test Conference, 2022

2019

Resiliency of automotive object detection networks on GPU architectures.

Atieh Lotfi, Saurabh Hukerikar, Keshav Balasubramanian, Paul Racunas, Nirmal R. Saxena, Richard Bramley, Yanxiang Huang

Proceedings of the IEEE International Test Conference, 2019

Accelerating Local Binary Pattern Networks with Software-Programmable FPGAs.

Jeng-Hau Lin, Atieh Lotfi, Vahideh Akhlaghi, Zhuowen Tu, Rajesh K. Gupta

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018

Fault-susceptibility Mitigation and Efficient Use of Resources in Programmable Hardware Accelerators.

Atieh Lotfi

PhD thesis, 2018

Low Overhead Tag Error Mitigation for GPU Architectures.

Atieh Lotfi, Nirmal R. Saxena, Richard Bramley, Paul Racunas, Philip P. Shirvani

Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2018

2017

ReHLS: Resource-Aware Program Transformation Workflow for High-Level Synthesis.

Atieh Lotfi, Rajesh K. Gupta

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

RxRE: Throughput Optimization for High-Level Synthesis using Resource-Aware Regularity Extraction (Abstract Only).

Atieh Lotfi, Rajesh K. Gupta

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

2016

Grater: An approximation workflow for exploiting data-level parallelism in FPGA acceleration.

Atieh Lotfi, Abbas Rahimi, Amir Yazdanbakhsh, Hadi Esmaeilzadeh, Rajesh K. Gupta

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

Aging-Aware Compilation for GP-GPUs.

Atieh Lotfi, Abbas Rahimi, Luca Benini, Rajesh K. Gupta

ACM Trans. Archit. Code Optim., 2015

2013

A fine-grain distortion and complexity aware parameter tuning model for the H.264/AVC encoder.

Mehdi Semsarzadeh, Atieh Lotfi, Mahmoud Reza Hashemi, Shervin Shirmohammadi

Signal Process. Image Commun., 2013

2012

Architectural vulnerability aware checkpoint placement in a multicore processor.

Atieh Lotfi, Arash Bayat, Saeed Safari

Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

2011

Configurable architecture for memory BIST.

Atieh Lotfi, Parisa Kabiri, Zainalabedin Navabi

Proceedings of the 9th East-West Design & Test Symposium, 2011