Athon Zanikopoulos

According to our database, Athon Zanikopoulos authored at least 11 papers between 2005 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

An 11b 3.6GS/s time-interleaved SAR ADC in 65nm CMOS.

Erwin Janssen, Kostas Doris, Athon Zanikopoulos, Alessandro Murroni, Gerard van der Weide, Yu Lin, Ludo Alvado, Frederic Darthenay, Yannick Fregeais

Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signals.

Yu Lin, Kostas Doris, Erwin Janssen, Athon Zanikopoulos, Alessandro Murroni, Gerard van der Weide, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the ESSCIRC 2013, 2013

2011

A 480 mW 2.6 GS/s 10b Time-Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOS.

Kostas Doris, Erwin Janssen, Claudio Nani, Athon Zanikopoulos, Gerard van der Weide

IEEE J. Solid State Circuits, 2011

A 480mW 2.6GS/s 10b 65nm CMOS time-interleaved ADC with 48.5dB SNDR up to Nyquist.

Konstantinos Doris, Erwin Janssen, Claudio Nani, Athon Zanikopoulos, Gerard van der Weide

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2007

Design of the Basic Building Block of a High-Speed Flexible and Modular Pipelined ADC.

Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Analog Calibration of Mismatches in an Open-Loop Track-and-Hold Circuit for Time-Interleaved ADCs.

Pieter Harpe, Athon Zanikopoulos, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Digital post-correction of front-end track-and-hold circuits in ADCs.

Pieter Harpe, Athon Zanikopoulos, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Power Optimization for Pipelined ADCs with Open-Loop Residue Amplifiers.

Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

A flexible ADC approach for mixed-signal SoC platforms.

Athon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Smart AD and DA converters.

Arthur H. M. van Roermund, Hans Hegt, Pieter Harpe, Georgi I. Radulov, Athon Zanikopoulos, Konstantinos Doris, Patrick J. Quinn

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Digital self-correction of time-interleaved ADCs.

Pieter Harpe, Athon Zanikopoulos, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005