Athanasios Kakarountas

Epameinontas Hatzidimitriou

Paris Kitsos

Proceedings of the 6th International Symposium on Communications, 2014

Extending visitor's reality at museums.

[BibT_eX]

[DOI]

Stamatis Dragoumanos

Konstantinos Kakarountas

Proceedings of the 5th International Conference on Information, 2014

2011

Cipher Block Based Authentication Module: a Hardware Design Perspective.

[BibT_eX]

[DOI]

Dimitrios M. Schinianakis

Georgios N. Selimis

J. Circuits Syst. Comput., 2011

Efficient Exploitation of Parallel Computing on the Server-Side of Health Organizations' Intranet for Distributing Medical Images to Smart Devices.

[BibT_eX]

[DOI]

Ilias Mavridis

Proceedings of the Wireless Mobile Communication and Healthcare, 2011

A survey on throughput-efficient architectures for IEEE P1619 for shared storage media.

[BibT_eX]

[DOI]

Epameinontas Hatzidimitriou

Proceedings of the 16th IEEE Symposium on Computers and Communications, 2011

High-throughput ASIC implementation of an encryption core for securing shared storage media.

[BibT_eX]

[DOI]

Epameinontas Hatzidimitriou

Proceedings of the 17th International Conference on Digital Signal Processing, 2011

2010

Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2010

Planning and Development of an Electronic Health Record Client Based on the Android Platform.

[BibT_eX]

[DOI]

Dimitris Tychalas

Proceedings of the 14th Panhellenic Conference on Informatics, 2010

Exploration of 2D Cellular Automata as Binary Sequence Generators.

[BibT_eX]

[DOI]

Efthymia Arvaniti

Ilias Mavridis

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009

A Top-Down Design Methodology for Ultrahigh-Performance Hashing Cores.

[BibT_eX]

[DOI]

Dimitrios M. Schinianakis

IEEE Trans. Dependable Secur. Comput., 2009

An RNS Implementation of an Fp Elliptic Curve Point Multiplier.

[BibT_eX]

[DOI]

Apostolos P. Fournaris

Thanos Stouraitis

IEEE Trans. Circuits Syst. I Regul. Pap., 2009

Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse.

[BibT_eX]

[DOI]

Vasileios Porpodas

Nikolaos Alachiotis

IET Comput. Digit. Tech., 2009

Elliptic Curve Point Multiplication in GF(2n) using Polynomial Residue Arithmetic.

[BibT_eX]

[DOI]

Dimitrios Schinianakis

Markos E. Papadonikolakis

Thanos Stouraitis

Alexander Skavantzos

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

Efficient high-performance implementation of JPEG-LS encoder.

[BibT_eX]

[DOI]

J. Real Time Image Process., 2008

2007

A Low Power Design for Sbox Cryptographic Primitive of Advanced Encryption Standard for Mobile End-Users.

[BibT_eX]

[DOI]

George N. Selimis

Apostolos P. Fournaris

Odysseas G. Koufopavlou

J. Low Power Electron., 2007

Server side hashing core exceeding 3 Gbps of throughput.

[BibT_eX]

[DOI]

Vasilis N. Thanasoulis

Int. J. Secur. Networks, 2007

Throughput Optimization of the Cipher Message Authentication Code.

[BibT_eX]

[DOI]

Georgios N. Selimis

Proceedings of the 15th International Conference on Digital Signal Processing, 2007

Implementation of HSSec: a high-speed cryptographic co-processor.

[BibT_eX]

[DOI]

Haralambos Michail

Markos E. Papadonikolakis

Costas Efstathiou

Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2007

Efficient high-performance ASIC implementation of JPEG-LS encoder.

[BibT_eX]

[DOI]

Vasilleios Pantazis

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy.

[BibT_eX]

[DOI]

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications.

[BibT_eX]

[DOI]

J. Supercomput., 2006

A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems.

[BibT_eX]

[DOI]

Michalis D. Galanis

Microelectron. J., 2006

Power Management Through Dynamic Frequency Scaling for Low and Medium Bit-Rate Digital Receivers.

[BibT_eX]

[DOI]

Dimitrios M. Schinianakis

J. Low Power Electron., 2006

An RNS architecture of an Fp elliptic curve point multiplier.

[BibT_eX]

[DOI]

Apostolos P. Fournaris

Thanos Stouraitis

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Temporal and System Level Modifications for High Speed VLSI Implementations of Cryptographic Core.

[BibT_eX]

[DOI]

Vasilis N. Thanasoulis

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Optimizing SHA-1 Hash Function for High Throughput with a Partial Unrolling Study.

[BibT_eX]

[DOI]

Haralambos Michail

George N. Selimis

Proceedings of the Integrated Circuit and System Design, 2005

A low-power and high-throughput implementation of the SHA-1 hash function.

[BibT_eX]

[DOI]

Haralambos Michail

Odysseas G. Koufopavlou

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Novel high throughput implementation of SHA-256 hash function through pre-computation technique.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Conference on Electronics, 2005

2004

A Framework for Data Partitioning for C++ Data-Intensive Applications.

[BibT_eX]

[DOI]

Gregory Dimitroulakos

Michalis D. Galanis

Francky Catthoor

Des. Autom. Embed. Syst., 2004

A Novel Constant-Time Fault-Secure Binary Counter.

[BibT_eX]

[DOI]

Dimitris Karatasos

Proceedings of the Integrated Circuit and System Design, 2004

The Impact of Low-Power Techniques on the Design of Portable Safety-Critical Systems.

[BibT_eX]

[DOI]

Vassilis Spiliotopoulos

Spiridon Nikolaidis

Proceedings of the Integrated Circuit and System Design, 2004

Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function.

[BibT_eX]

[DOI]

Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

2003

A Methodology for Calculating the Undetectable Double-Faults in Self-Checking Circuits.

[BibT_eX]

[DOI]

Spiridon Nikolaidis

E. Karaolis

Kyriakos Papadomanolakis

J. Circuits Syst. Comput., 2003

A novel high-speed counter with counting rate independent of the counter's length.

[BibT_eX]

[DOI]

Kyriakos S. Papadomanolakis

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002

Confronting violations of the TSCG(T) in low-power design.

[BibT_eX]

[DOI]

Kyriakos Papadomanolakis

Spiridon Nikolaidis

Dimitrios Soudris

Kyriakos S. Papadomanolakis

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A low power fault secure timer implementation based on the Gray encoding scheme.

[BibT_eX]

[DOI]

Nicolas Sklavos

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001

Design of low-power on-line reconfigurable datapaths using self-checking circuits.

[BibT_eX]

[DOI]

Vasileios Kokkinos

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000

Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers.

[BibT_eX]

[DOI]

Nikolaos D. Zervas

S. Theoharis

Dimitrios Soudris

Proceedings of the Integrated Circuit Design, 2000

Comparative Study on Self-Checking Carry-Propagate Adders in Terms of Area, Power and Performance.

[BibT_eX]

[DOI]

Kyriakos Papadomanolakis

Vasileios Kokkinos